From 4c479112190008b18c7f4be987d5c39b79f01d57 Mon Sep 17 00:00:00 2001 From: ricardochust Date: Fri, 10 Nov 2023 19:20:58 +0100 Subject: [PATCH] DMA configuration changes --- Core/Inc/stm32h7xx_it.h | 3 ++ Core/Src/Runes/Runes.hpp | 5 ++++ Core/Src/stm32h7xx_hal_msp.c | 53 +++++++++++++++++++++++++++++++++++- Core/Src/stm32h7xx_it.c | 46 +++++++++++++++++++++++++++++++ 4 files changed, 106 insertions(+), 1 deletion(-) diff --git a/Core/Inc/stm32h7xx_it.h b/Core/Inc/stm32h7xx_it.h index 85a3a2d0..b0223e1b 100644 --- a/Core/Inc/stm32h7xx_it.h +++ b/Core/Inc/stm32h7xx_it.h @@ -62,10 +62,13 @@ void DMA1_Stream1_IRQHandler(void); void DMA1_Stream2_IRQHandler(void); void DMA1_Stream3_IRQHandler(void); void DMA1_Stream4_IRQHandler(void); +void DMA1_Stream5_IRQHandler(void); +void DMA1_Stream6_IRQHandler(void); void TIM2_IRQHandler(void); void I2C2_EV_IRQHandler(void); void TIM8_TRG_COM_TIM14_IRQHandler(void); void TIM5_IRQHandler(void); +void SPI3_IRQHandler(void); void TIM7_IRQHandler(void); void ETH_IRQHandler(void); void LPTIM1_IRQHandler(void); diff --git a/Core/Src/Runes/Runes.hpp b/Core/Src/Runes/Runes.hpp index b1351d2f..9576961f 100644 --- a/Core/Src/Runes/Runes.hpp +++ b/Core/Src/Runes/Runes.hpp @@ -4,6 +4,8 @@ DMA_HandleTypeDef hdma_adc1; DMA_HandleTypeDef hdma_adc2; DMA_HandleTypeDef hdma_adc3; +DMA_HandleTypeDef hdma_spi3_rx; +DMA_HandleTypeDef hdma_spi3_tx; DMA_HandleTypeDef hdma_i2c2_rx; DMA_HandleTypeDef hdma_i2c2_tx; I2C_HandleTypeDef hi2c2; @@ -65,7 +67,10 @@ unordered_map FDCAN::handle_to_fdcan = { SPI::Instance SPI::instance3 = { .SCK = &PC10, .MOSI = &PC12, .MISO = &PC11, .SS = &PD0, .hspi = &hspi3, .instance = SPI3, + .hdma_tx = DMA::Stream::DMA1Stream5, + .hdma_rx = DMA::Stream::DMA1Stream6, .baud_rate_prescaler = SPI_BAUDRATEPRESCALER_256, + .mode = SPI_MODE_SLAVE, }; SPI::Peripheral SPI::spi3 = SPI::Peripheral::peripheral3; diff --git a/Core/Src/stm32h7xx_hal_msp.c b/Core/Src/stm32h7xx_hal_msp.c index 8830f208..5a48af8c 100644 --- a/Core/Src/stm32h7xx_hal_msp.c +++ b/Core/Src/stm32h7xx_hal_msp.c @@ -33,6 +33,10 @@ extern DMA_HandleTypeDef hdma_i2c2_rx; extern DMA_HandleTypeDef hdma_i2c2_tx; +extern DMA_HandleTypeDef hdma_spi3_rx; + +extern DMA_HandleTypeDef hdma_spi3_tx; + /* Private typedef -----------------------------------------------------------*/ /* USER CODE BEGIN TD */ @@ -941,8 +945,49 @@ void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi) GPIO_InitStruct.Alternate = GPIO_AF6_SPI3; HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); - /* USER CODE BEGIN SPI3_MspInit 1 */ + /* SPI3 DMA Init */ + /* SPI3_RX Init */ + hdma_spi3_rx.Instance = DMA1_Stream5; + hdma_spi3_rx.Init.Request = DMA_REQUEST_SPI3_RX; + hdma_spi3_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; + hdma_spi3_rx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_spi3_rx.Init.MemInc = DMA_MINC_ENABLE; + hdma_spi3_rx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_spi3_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_spi3_rx.Init.Mode = DMA_NORMAL; + hdma_spi3_rx.Init.Priority = DMA_PRIORITY_LOW; + hdma_spi3_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + hdma_spi3_rx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + if (HAL_DMA_Init(&hdma_spi3_rx) != HAL_OK) + { + Error_Handler(); + } + __HAL_LINKDMA(hspi,hdmarx,hdma_spi3_rx); + + /* SPI3_TX Init */ + hdma_spi3_tx.Instance = DMA1_Stream6; + hdma_spi3_tx.Init.Request = DMA_REQUEST_SPI3_TX; + hdma_spi3_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; + hdma_spi3_tx.Init.PeriphInc = DMA_PINC_DISABLE; + hdma_spi3_tx.Init.MemInc = DMA_MINC_ENABLE; + hdma_spi3_tx.Init.PeriphDataAlignment = DMA_PDATAALIGN_BYTE; + hdma_spi3_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; + hdma_spi3_tx.Init.Mode = DMA_NORMAL; + hdma_spi3_tx.Init.Priority = DMA_PRIORITY_LOW; + hdma_spi3_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; + hdma_spi3_tx.Init.FIFOThreshold = DMA_FIFO_THRESHOLD_FULL; + if (HAL_DMA_Init(&hdma_spi3_tx) != HAL_OK) + { + Error_Handler(); + } + + __HAL_LINKDMA(hspi,hdmatx,hdma_spi3_tx); + + /* SPI3 interrupt Init */ + HAL_NVIC_SetPriority(SPI3_IRQn, 0, 0); + HAL_NVIC_EnableIRQ(SPI3_IRQn); + /* USER CODE BEGIN SPI3_MspInit 1 */ /* USER CODE END SPI3_MspInit 1 */ } @@ -971,6 +1016,12 @@ void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi) */ HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12); + /* SPI3 DMA DeInit */ + HAL_DMA_DeInit(hspi->hdmarx); + HAL_DMA_DeInit(hspi->hdmatx); + + /* SPI3 interrupt DeInit */ + HAL_NVIC_DisableIRQ(SPI3_IRQn); /* USER CODE BEGIN SPI3_MspDeInit 1 */ /* USER CODE END SPI3_MspDeInit 1 */ diff --git a/Core/Src/stm32h7xx_it.c b/Core/Src/stm32h7xx_it.c index 8d5d959c..c109b2f0 100644 --- a/Core/Src/stm32h7xx_it.c +++ b/Core/Src/stm32h7xx_it.c @@ -61,9 +61,13 @@ extern DMA_HandleTypeDef hdma_adc2; extern DMA_HandleTypeDef hdma_adc3; extern DMA_HandleTypeDef hdma_i2c2_rx; extern DMA_HandleTypeDef hdma_i2c2_tx; +extern I2C_HandleTypeDef hi2c2; extern LPTIM_HandleTypeDef hlptim1; extern LPTIM_HandleTypeDef hlptim2; extern LPTIM_HandleTypeDef hlptim3; +extern DMA_HandleTypeDef hdma_spi3_rx; +extern DMA_HandleTypeDef hdma_spi3_tx; +extern SPI_HandleTypeDef hspi3; extern TIM_HandleTypeDef htim2; extern TIM_HandleTypeDef htim5; extern TIM_HandleTypeDef htim7; @@ -310,6 +314,34 @@ void DMA1_Stream4_IRQHandler(void) /* USER CODE END DMA1_Stream4_IRQn 1 */ } +/** + * @brief This function handles DMA1 stream5 global interrupt. + */ +void DMA1_Stream5_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Stream5_IRQn 0 */ + + /* USER CODE END DMA1_Stream5_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_spi3_rx); + /* USER CODE BEGIN DMA1_Stream5_IRQn 1 */ + + /* USER CODE END DMA1_Stream5_IRQn 1 */ +} + +/** + * @brief This function handles DMA1 stream6 global interrupt. + */ +void DMA1_Stream6_IRQHandler(void) +{ + /* USER CODE BEGIN DMA1_Stream6_IRQn 0 */ + + /* USER CODE END DMA1_Stream6_IRQn 0 */ + HAL_DMA_IRQHandler(&hdma_spi3_tx); + /* USER CODE BEGIN DMA1_Stream6_IRQn 1 */ + + /* USER CODE END DMA1_Stream6_IRQn 1 */ +} + /** * @brief This function handles TIM2 global interrupt. */ @@ -352,6 +384,20 @@ void TIM5_IRQHandler(void) /* USER CODE END TIM5_IRQn 1 */ } +/** + * @brief This function handles SPI3 global interrupt. + */ +void SPI3_IRQHandler(void) +{ + /* USER CODE BEGIN SPI3_IRQn 0 */ + + /* USER CODE END SPI3_IRQn 0 */ + HAL_SPI_IRQHandler(&hspi3); + /* USER CODE BEGIN SPI3_IRQn 1 */ + + /* USER CODE END SPI3_IRQn 1 */ +} + /** * @brief This function handles TIM7 global interrupt. */