diff --git a/.travis.yml b/.travis.yml index a2685e41b940..4a97918f1b12 100755 --- a/.travis.yml +++ b/.travis.yml @@ -34,7 +34,9 @@ script: - source build.sh <<< "23${ndevicechoice}4167q" # Overclocked -- patch -p1 < ../patchs/0001-LProj-CAFKernel-With-Over-Clock.patch +- patch -p1 < ../patchs/0000-build.sh-Change-to-KK-WithOverClock.patch +- patch -p1 < ../patchs/0001-acpuclock-7627-Update-7x25-7x27-clock.patch +- patch -p1 < ../patchs/0002-configs-Update-MAX-MIN-of-7x25-7x27-processors.patch - export ndevicechoice="1" - source build.sh <<< "23${ndevicechoice}4167q" - export ndevicechoice="2" @@ -75,7 +77,9 @@ script: - source build.sh <<< "23${ndevicechoice}4167q" # Overclocked -- patch -p1 < ../patchs/0001-LProj-CAFKernel-With-Over-Clock.patch +- patch -p1 < ../patchs/0000-build.sh-Change-to-MM-WithOverClock.patch +- patch -p1 < ../patchs/0001-acpuclock-7627-Update-7x25-7x27-clock.patch +- patch -p1 < ../patchs/0002-configs-Update-MAX-MIN-of-7x25-7x27-processors.patch - export ndevicechoice="1" - source build.sh <<< "23${ndevicechoice}4167q" - export ndevicechoice="2" diff --git a/patchs/0000-build.sh-Change-to-KK-WithOverClock.patch b/patchs/0000-build.sh-Change-to-KK-WithOverClock.patch new file mode 100644 index 000000000000..3651195e47a9 --- /dev/null +++ b/patchs/0000-build.sh-Change-to-KK-WithOverClock.patch @@ -0,0 +1,26 @@ +From a293b94d494691bdba3b07e588b19d51ddfd5e9b Mon Sep 17 00:00:00 2001 +From: Caio Oliveira +Date: Tue, 6 Dec 2016 12:48:48 -0200 +Subject: build.sh: Change to KK WithOverClock + +Signed-off-by: Caio Oliveira +--- + build.sh | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/build.sh b/build.sh +index a8611e4..8e78f3b 100755 +--- a/build.sh ++++ b/build.sh +@@ -265,7 +265,7 @@ then + # Main Variables + custom_kernel=LProj-CAFKernel + builder=TeamHackLG +- custom_kernel_branch=KK ++ custom_kernel_branch=KK-WOC + ARCH=arm + + while true +-- +2.10.1 + diff --git a/patchs/0000-build.sh-Change-to-MM-WithOverClock.patch b/patchs/0000-build.sh-Change-to-MM-WithOverClock.patch new file mode 100644 index 000000000000..f8414f4ea002 --- /dev/null +++ b/patchs/0000-build.sh-Change-to-MM-WithOverClock.patch @@ -0,0 +1,26 @@ +From a293b94d494691bdba3b07e588b19d51ddfd5e9b Mon Sep 17 00:00:00 2001 +From: Caio Oliveira +Date: Tue, 6 Dec 2016 12:48:48 -0200 +Subject: build.sh: Change to MM WithOverClock + +Signed-off-by: Caio Oliveira +--- + build.sh | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/build.sh b/build.sh +index a8611e4..8e78f3b 100755 +--- a/build.sh ++++ b/build.sh +@@ -265,7 +265,7 @@ then + # Main Variables + custom_kernel=LProj-CAFKernel + builder=TeamHackLG +- custom_kernel_branch=MM ++ custom_kernel_branch=MM-WOC + ARCH=arm + + while true +-- +2.10.1 + diff --git a/patchs/0001-LProj-CAFKernel-With-Over-Clock.patch b/patchs/0001-LProj-CAFKernel-With-Over-Clock.patch deleted file mode 100644 index 7fe79cbe0229..000000000000 --- a/patchs/0001-LProj-CAFKernel-With-Over-Clock.patch +++ /dev/null @@ -1,321 +0,0 @@ -From 53152a235e65cd9d936833657497c8d7642e5561 Mon Sep 17 00:00:00 2001 -From: Caio Oliveira -Date: Tue, 6 Dec 2016 12:48:48 -0200 -Subject: [PATCH 1/3] build.sh: Change to WithOverClock - -Signed-off-by: Caio Oliveira ---- - build.sh | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/build.sh b/build.sh -index a8611e4..8e78f3b 100755 ---- a/build.sh -+++ b/build.sh -@@ -265,7 +265,7 @@ then - # Main Variables - custom_kernel=LProj-CAFKernel - builder=TeamHackLG -- custom_kernel_branch=KK -+ custom_kernel_branch=KK-WOC - ARCH=arm - - while true --- -2.10.1 - - -From dde26be3220a05d5074bc2e089f5935cea3303cf Mon Sep 17 00:00:00 2001 -From: Caio Oliveira -Date: Tue, 6 Dec 2016 12:50:45 -0200 -Subject: [PATCH 2/3] acpuclock-7627: Update 7x25/7x27 clock - -* add CRAZY overclock and fix overclocks - -Signed-off-by: Caio Oliveira ---- - arch/arm/mach-msm/Kconfig | 10 ++++++ - arch/arm/mach-msm/acpuclock-7627.c | 67 ++++++++++++++------------------------ - 2 files changed, 34 insertions(+), 43 deletions(-) - -diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig -index c1f83d8..6b2d7c5 100644 ---- a/arch/arm/mach-msm/Kconfig -+++ b/arch/arm/mach-msm/Kconfig -@@ -1539,6 +1539,16 @@ config MSM7X27A_OVERCLOCK - help - Enable support for non-standard msm7x27A acpuclock frequencies/voltages. - -+config MSM7X27A_CRAZYOVERCLOCK -+ bool "Enable Crazy SoC CPU OverClocking for MSM7x27A" -+ depends on ARCH_MSM7X27A -+ depends on (MACH_MSM7X25A_V3 || MACH_MSM7X25A_V1) -+ depends on !MACH_MSM7X25A_M4 -+ select MSM7X27A_OVERCLOCK -+ default n -+ help -+ Enable support for a crazy and non-standard msm7x27A acpuclock frequencies. -+ - endif # CPU_FREQ_MSM - - config MSM_CPU_AVS -diff --git a/arch/arm/mach-msm/acpuclock-7627.c b/arch/arm/mach-msm/acpuclock-7627.c -index 4b70cbf..68efdae 100644 ---- a/arch/arm/mach-msm/acpuclock-7627.c -+++ b/arch/arm/mach-msm/acpuclock-7627.c -@@ -191,19 +191,19 @@ static struct clkctl_acpu_speed pll0_960_pll1_196_pll2_800_pll4_0[] = { - /* 7627a PLL4 @ 800MHz with GSM capable modem */ - static struct clkctl_acpu_speed pll0_960_pll1_245_pll2_1200_pll4_800[] = { - { 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 30720 }, -- { 1, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 }, -- { 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 }, -- { 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 }, -- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 }, -- { 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 }, -- { 0, 400000, ACPU_PLL_4, 6, 1, 50000, 3, 4, 122880 }, -- { 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 }, -- { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 160000 }, -- { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 }, -+ { 1, 50000, ACPU_PLL_1, 1, 3, 6250, 3, 1, 61440 }, -+ { 1, 100000, ACPU_PLL_1, 1, 1, 12500, 3, 1, 61440 }, -+ { 1, 200000, ACPU_PLL_1, 1, 0, 25000, 3, 1, 61440 }, -+ { 1, 300000, ACPU_PLL_0, 4, 2, 37500, 3, 2, 122880 }, -+ { 1, 400000, ACPU_PLL_0, 4, 2, 50000, 3, 3, 122880 }, -+ { 1, 500000, ACPU_PLL_0, 4, 1, 62500, 3, 3, 122880 }, -+ { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 4, 160000 }, -+ { 1, 700000, ACPU_PLL_4, 6, 0, 87500, 3, 4, 160000 }, -+ { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 5, 160000 }, - #ifdef CONFIG_MSM7X27A_OVERCLOCK -- { 1, 900000, ACPU_PLL_2, 2, 0, 112500, 3, 7, 200000 }, -- { 1, 1000000, ACPU_PLL_2, 2, 0, 125000, 3, 7, 200000 }, -- { 1, 1100000, ACPU_PLL_2, 2, 0, 137500, 3, 7, 200000 }, -+ { 1, 900000, ACPU_PLL_4, 6, 0, 112500, 3, 6, 200000 }, -+ { 1, 1000000, ACPU_PLL_4, 6, 0, 125000, 3, 7, 200000 }, -+ { 1, 1100000, ACPU_PLL_4, 6, 0, 137500, 3, 7, 200000 }, - #endif - { 0 } - }; -@@ -226,24 +226,25 @@ static struct clkctl_acpu_speed pll0_960_pll1_196_pll2_1200_pll4_800[] = { - /* 7627aa PLL4 @ 1008MHz with GSM capable modem */ - static struct clkctl_acpu_speed pll0_960_pll1_245_pll2_1200_pll4_1008[] = { - { 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 30720 }, -- { 1, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 }, -- { 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 }, -- { 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 }, -- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 }, -- { 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 }, -- { 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 }, -- { 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 160000 }, -- { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 160000 }, -- { 1, 700000, ACPU_PLL_4, 6, 0, 87500, 3, 6, 200000 }, -- { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 6, 200000 }, -+ { 1, 50000, ACPU_PLL_1, 1, 3, 6250, 3, 1, 61440 }, -+ { 1, 100000, ACPU_PLL_1, 1, 1, 12500, 3, 1, 61440 }, -+ { 1, 200000, ACPU_PLL_1, 1, 0, 25000, 3, 1, 61440 }, -+ { 1, 300000, ACPU_PLL_0, 4, 2, 37500, 3, 2, 122880 }, -+ { 1, 400000, ACPU_PLL_0, 4, 2, 50000, 3, 3, 122880 }, -+ { 1, 500000, ACPU_PLL_0, 4, 1, 62500, 3, 3, 122880 }, -+ { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 4, 160000 }, -+ { 1, 700000, ACPU_PLL_4, 6, 0, 87500, 3, 4, 160000 }, -+ { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 5, 160000 }, - { 1, 900000, ACPU_PLL_4, 6, 0, 112500, 3, 6, 200000 }, - { 1, 1000000, ACPU_PLL_4, 6, 0, 125000, 3, 7, 200000 }, - #ifdef CONFIG_MSM7X27A_OVERCLOCK - { 1, 1100000, ACPU_PLL_4, 6, 0, 137500, 3, 7, 200000 }, - { 1, 1200000, ACPU_PLL_4, 6, 0, 150000, 3, 7, 200000 }, - { 1, 1300000, ACPU_PLL_4, 6, 0, 162500, 3, 7, 200000 }, --#if defined(CONFIG_MACH_MSM7X25A_V3) || defined(CONFIG_MACH_MSM7X25A_V1) - { 1, 1400000, ACPU_PLL_4, 6, 0, 175000, 3, 7, 200000 }, -+#ifdef CONFIG_MSM7X27A_CRAZYOVERCLOCK -+ { 1, 1500000, ACPU_PLL_4, 6, 0, 187500, 3, 7, 200000 }, -+ { 1, 1600000, ACPU_PLL_4, 6, 0, 200000, 3, 7, 200000 }, - #endif - #endif - { 0 } -@@ -631,26 +632,10 @@ static void acpuclk_set_div(const struct clkctl_acpu_speed *hunt_s) - { - uint32_t reg_clkctl, reg_clksel, clk_div, src_sel; - --#ifdef CONFIG_MSM7X27A_OVERCLOCK -- uint32_t a11_div; --#endif -- - reg_clksel = readl_relaxed(A11S_CLK_SEL_ADDR); - - /* AHB_CLK_DIV */ - clk_div = (reg_clksel >> 1) & 0x03; --#ifdef CONFIG_MSM7X27A_OVERCLOCK -- a11_div = hunt_s->a11clk_src_div; --#ifdef CONFIG_MACH_MSM7X25A_M4 -- if (hunt_s->a11clk_khz>800000) { --#else -- if (hunt_s->a11clk_khz>1000000) { --#endif -- a11_div = 0; -- writel(hunt_s->a11clk_khz/19200, MSM_CLK_CTL_BASE+0x33C); -- udelay(50); -- } --#endif - /* CLK_SEL_SRC1NO */ - src_sel = reg_clksel & 1; - -@@ -668,11 +653,7 @@ static void acpuclk_set_div(const struct clkctl_acpu_speed *hunt_s) - reg_clkctl = readl_relaxed(A11S_CLK_CNTL_ADDR); - reg_clkctl &= ~(0xFF << (8 * src_sel)); - reg_clkctl |= hunt_s->a11clk_src_sel << (4 + 8 * src_sel); --#ifdef CONFIG_MSM7X27A_OVERCLOCK -- reg_clkctl |= a11_div << (0 + 8 * src_sel); --#else - reg_clkctl |= hunt_s->a11clk_src_div << (0 + 8 * src_sel); --#endif - writel_relaxed(reg_clkctl, A11S_CLK_CNTL_ADDR); - - /* Program clock source selection */ --- -2.10.1 - - -From d67832d42b0d3688bcc22668f32dc12d5ef9ed88 Mon Sep 17 00:00:00 2001 -From: Caio Oliveira -Date: Tue, 6 Dec 2016 12:52:17 -0200 -Subject: [PATCH 3/3] configs: Update MAX/MIN of 7x25/7x27 processors - -* L1II/L3II/L7 have a 7x27 procesor (1008MHz Max) -* L5 have a 7x25 processor (800MHz Max) -* Enable 7x25/7x27 processor overclock -* Enable 7x27 processor crazy overclock - -Signed-off-by: Caio Oliveira ---- - arch/arm/configs/cyanogenmod_m4_defconfig | 4 ++-- - arch/arm/configs/cyanogenmod_m4_nonfc_defconfig | 4 ++-- - arch/arm/configs/cyanogenmod_u0_8m_defconfig | 7 ++++--- - arch/arm/configs/cyanogenmod_u0_defconfig | 7 ++++--- - arch/arm/configs/cyanogenmod_u0_nonfc_defconfig | 7 ++++--- - arch/arm/configs/cyanogenmod_v1_defconfig | 7 ++++--- - arch/arm/configs/cyanogenmod_vee3_defconfig | 7 ++++--- - 7 files changed, 24 insertions(+), 19 deletions(-) - -diff --git a/arch/arm/configs/cyanogenmod_m4_defconfig b/arch/arm/configs/cyanogenmod_m4_defconfig -index cd9e36a..802a70c 100644 ---- a/arch/arm/configs/cyanogenmod_m4_defconfig -+++ b/arch/arm/configs/cyanogenmod_m4_defconfig -@@ -461,8 +461,8 @@ CONFIG_MSM_DALRPC=y - # CONFIG_MSM_DALRPC_TEST is not set - CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y - CONFIG_MSM_CPU_FREQ_MAX=800000 --CONFIG_MSM_CPU_FREQ_MIN=61440 --# CONFIG_MSM7X27A_OVERCLOCK is not set -+CONFIG_MSM_CPU_FREQ_MIN=50000 -+CONFIG_MSM7X27A_OVERCLOCK=y - # CONFIG_MSM_AVS_HW is not set - # CONFIG_MSM_HW3D is not set - CONFIG_MSM_ADSP=y -diff --git a/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig b/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig -index 6a89208..e5f5a09 100644 ---- a/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig -+++ b/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig -@@ -461,8 +461,8 @@ CONFIG_MSM_DALRPC=y - # CONFIG_MSM_DALRPC_TEST is not set - CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y - CONFIG_MSM_CPU_FREQ_MAX=800000 --CONFIG_MSM_CPU_FREQ_MIN=61440 --# CONFIG_MSM7X27A_OVERCLOCK is not set -+CONFIG_MSM_CPU_FREQ_MIN=50000 -+CONFIG_MSM7X27A_OVERCLOCK=y - # CONFIG_MSM_AVS_HW is not set - # CONFIG_MSM_HW3D is not set - CONFIG_MSM_ADSP=y -diff --git a/arch/arm/configs/cyanogenmod_u0_8m_defconfig b/arch/arm/configs/cyanogenmod_u0_8m_defconfig -index eafd6ad..a08a65a 100644 ---- a/arch/arm/configs/cyanogenmod_u0_8m_defconfig -+++ b/arch/arm/configs/cyanogenmod_u0_8m_defconfig -@@ -459,9 +459,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y - CONFIG_MSM_DALRPC=y - # CONFIG_MSM_DALRPC_TEST is not set - CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y --CONFIG_MSM_CPU_FREQ_MAX=1008000 --CONFIG_MSM_CPU_FREQ_MIN=61440 --# CONFIG_MSM7X27A_OVERCLOCK is not set -+CONFIG_MSM_CPU_FREQ_MAX=1000000 -+CONFIG_MSM_CPU_FREQ_MIN=50000 -+CONFIG_MSM7X27A_OVERCLOCK=y -+CONFIG_MSM7X27A_CRAZYOVERCLOCK=y - # CONFIG_MSM_AVS_HW is not set - # CONFIG_MSM_HW3D is not set - CONFIG_MSM_ADSP=y -diff --git a/arch/arm/configs/cyanogenmod_u0_defconfig b/arch/arm/configs/cyanogenmod_u0_defconfig -index d96b658..dfab126 100644 ---- a/arch/arm/configs/cyanogenmod_u0_defconfig -+++ b/arch/arm/configs/cyanogenmod_u0_defconfig -@@ -459,9 +459,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y - CONFIG_MSM_DALRPC=y - # CONFIG_MSM_DALRPC_TEST is not set - CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y --CONFIG_MSM_CPU_FREQ_MAX=1008000 --CONFIG_MSM_CPU_FREQ_MIN=61440 --# CONFIG_MSM7X27A_OVERCLOCK is not set -+CONFIG_MSM_CPU_FREQ_MAX=1000000 -+CONFIG_MSM_CPU_FREQ_MIN=50000 -+CONFIG_MSM7X27A_OVERCLOCK=y -+CONFIG_MSM7X27A_CRAZYOVERCLOCK=y - # CONFIG_MSM_AVS_HW is not set - # CONFIG_MSM_HW3D is not set - CONFIG_MSM_ADSP=y -diff --git a/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig b/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig -index cfe2c69..75ece88 100644 ---- a/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig -+++ b/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig -@@ -459,9 +459,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y - CONFIG_MSM_DALRPC=y - # CONFIG_MSM_DALRPC_TEST is not set - CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y --CONFIG_MSM_CPU_FREQ_MAX=1008000 --CONFIG_MSM_CPU_FREQ_MIN=61440 --# CONFIG_MSM7X27A_OVERCLOCK is not set -+CONFIG_MSM_CPU_FREQ_MAX=1000000 -+CONFIG_MSM_CPU_FREQ_MIN=50000 -+CONFIG_MSM7X27A_OVERCLOCK=y -+CONFIG_MSM7X27A_CRAZYOVERCLOCK=y - # CONFIG_MSM_AVS_HW is not set - # CONFIG_MSM_HW3D is not set - CONFIG_MSM_ADSP=y -diff --git a/arch/arm/configs/cyanogenmod_v1_defconfig b/arch/arm/configs/cyanogenmod_v1_defconfig -index 7ba639b2..c584eec 100755 ---- a/arch/arm/configs/cyanogenmod_v1_defconfig -+++ b/arch/arm/configs/cyanogenmod_v1_defconfig -@@ -464,9 +464,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y - CONFIG_MSM_DALRPC=y - # CONFIG_MSM_DALRPC_TEST is not set - CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y --CONFIG_MSM_CPU_FREQ_MAX=1008000 --CONFIG_MSM_CPU_FREQ_MIN=61440 --# CONFIG_MSM7X27A_OVERCLOCK is not set -+CONFIG_MSM_CPU_FREQ_MAX=1000000 -+CONFIG_MSM_CPU_FREQ_MIN=50000 -+CONFIG_MSM7X27A_OVERCLOCK=y -+CONFIG_MSM7X27A_CRAZYOVERCLOCK=y - # CONFIG_MSM_AVS_HW is not set - # CONFIG_MSM_HW3D is not set - CONFIG_MSM_ADSP=y -diff --git a/arch/arm/configs/cyanogenmod_vee3_defconfig b/arch/arm/configs/cyanogenmod_vee3_defconfig -index 97070e1..3278781 100755 ---- a/arch/arm/configs/cyanogenmod_vee3_defconfig -+++ b/arch/arm/configs/cyanogenmod_vee3_defconfig -@@ -463,9 +463,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y - CONFIG_MSM_DALRPC=y - # CONFIG_MSM_DALRPC_TEST is not set - CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y --CONFIG_MSM_CPU_FREQ_MAX=1008000 --CONFIG_MSM_CPU_FREQ_MIN=61440 --# CONFIG_MSM7X27A_OVERCLOCK is not set -+CONFIG_MSM_CPU_FREQ_MAX=1000000 -+CONFIG_MSM_CPU_FREQ_MIN=50000 -+CONFIG_MSM7X27A_OVERCLOCK=y -+CONFIG_MSM7X27A_CRAZYOVERCLOCK=y - # CONFIG_MSM_AVS_HW is not set - # CONFIG_MSM_HW3D is not set - CONFIG_MSM_ADSP=y --- -2.10.1 - diff --git a/patchs/0001-acpuclock-7627-Update-7x25-7x27-clock.patch b/patchs/0001-acpuclock-7627-Update-7x25-7x27-clock.patch new file mode 100644 index 000000000000..de9adea9d971 --- /dev/null +++ b/patchs/0001-acpuclock-7627-Update-7x25-7x27-clock.patch @@ -0,0 +1,149 @@ +From 6b95cc7e86e4fdf92f7d643b342f7fbdd72a6446 Mon Sep 17 00:00:00 2001 +From: Caio Oliveira +Date: Tue, 6 Dec 2016 12:50:45 -0200 +Subject: [PATCH 1/2] acpuclock-7627: Update 7x25/7x27 clock + +* add CRAZY overclock and fix overclocks + +Signed-off-by: Caio Oliveira +--- + arch/arm/mach-msm/Kconfig | 10 ++++++ + arch/arm/mach-msm/acpuclock-7627.c | 67 ++++++++++++++------------------------ + 2 files changed, 34 insertions(+), 43 deletions(-) + +diff --git a/arch/arm/mach-msm/Kconfig b/arch/arm/mach-msm/Kconfig +index c1f83d8..6b2d7c5 100644 +--- a/arch/arm/mach-msm/Kconfig ++++ b/arch/arm/mach-msm/Kconfig +@@ -1539,6 +1539,16 @@ config MSM7X27A_OVERCLOCK + help + Enable support for non-standard msm7x27A acpuclock frequencies/voltages. + ++config MSM7X27A_CRAZYOVERCLOCK ++ bool "Enable Crazy SoC CPU OverClocking for MSM7x27A" ++ depends on ARCH_MSM7X27A ++ depends on (MACH_MSM7X25A_V3 || MACH_MSM7X25A_V1) ++ depends on !MACH_MSM7X25A_M4 ++ select MSM7X27A_OVERCLOCK ++ default n ++ help ++ Enable support for a crazy and non-standard msm7x27A acpuclock frequencies. ++ + endif # CPU_FREQ_MSM + + config MSM_CPU_AVS +diff --git a/arch/arm/mach-msm/acpuclock-7627.c b/arch/arm/mach-msm/acpuclock-7627.c +index 4b70cbf..68efdae 100644 +--- a/arch/arm/mach-msm/acpuclock-7627.c ++++ b/arch/arm/mach-msm/acpuclock-7627.c +@@ -191,19 +191,19 @@ static struct clkctl_acpu_speed pll0_960_pll1_196_pll2_800_pll4_0[] = { + /* 7627a PLL4 @ 800MHz with GSM capable modem */ + static struct clkctl_acpu_speed pll0_960_pll1_245_pll2_1200_pll4_800[] = { + { 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 30720 }, +- { 1, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 }, +- { 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 }, +- { 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 }, +- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 }, +- { 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 }, +- { 0, 400000, ACPU_PLL_4, 6, 1, 50000, 3, 4, 122880 }, +- { 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 }, +- { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 160000 }, +- { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 7, 200000 }, ++ { 1, 50000, ACPU_PLL_1, 1, 3, 6250, 3, 1, 61440 }, ++ { 1, 100000, ACPU_PLL_1, 1, 1, 12500, 3, 1, 61440 }, ++ { 1, 200000, ACPU_PLL_1, 1, 0, 25000, 3, 1, 61440 }, ++ { 1, 300000, ACPU_PLL_0, 4, 2, 37500, 3, 2, 122880 }, ++ { 1, 400000, ACPU_PLL_0, 4, 2, 50000, 3, 3, 122880 }, ++ { 1, 500000, ACPU_PLL_0, 4, 1, 62500, 3, 3, 122880 }, ++ { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 4, 160000 }, ++ { 1, 700000, ACPU_PLL_4, 6, 0, 87500, 3, 4, 160000 }, ++ { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 5, 160000 }, + #ifdef CONFIG_MSM7X27A_OVERCLOCK +- { 1, 900000, ACPU_PLL_2, 2, 0, 112500, 3, 7, 200000 }, +- { 1, 1000000, ACPU_PLL_2, 2, 0, 125000, 3, 7, 200000 }, +- { 1, 1100000, ACPU_PLL_2, 2, 0, 137500, 3, 7, 200000 }, ++ { 1, 900000, ACPU_PLL_4, 6, 0, 112500, 3, 6, 200000 }, ++ { 1, 1000000, ACPU_PLL_4, 6, 0, 125000, 3, 7, 200000 }, ++ { 1, 1100000, ACPU_PLL_4, 6, 0, 137500, 3, 7, 200000 }, + #endif + { 0 } + }; +@@ -226,24 +226,25 @@ static struct clkctl_acpu_speed pll0_960_pll1_196_pll2_1200_pll4_800[] = { + /* 7627aa PLL4 @ 1008MHz with GSM capable modem */ + static struct clkctl_acpu_speed pll0_960_pll1_245_pll2_1200_pll4_1008[] = { + { 0, 19200, ACPU_PLL_TCXO, 0, 0, 2400, 3, 0, 30720 }, +- { 1, 61440, ACPU_PLL_1, 1, 3, 7680, 3, 1, 61440 }, +- { 1, 122880, ACPU_PLL_1, 1, 1, 15360, 3, 2, 61440 }, +- { 1, 245760, ACPU_PLL_1, 1, 0, 30720, 3, 3, 61440 }, +- { 0, 300000, ACPU_PLL_2, 2, 3, 37500, 3, 4, 122880 }, +- { 1, 320000, ACPU_PLL_0, 4, 2, 40000, 3, 4, 122880 }, +- { 1, 480000, ACPU_PLL_0, 4, 1, 60000, 3, 5, 122880 }, +- { 0, 504000, ACPU_PLL_4, 6, 1, 63000, 3, 6, 160000 }, +- { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 6, 160000 }, +- { 1, 700000, ACPU_PLL_4, 6, 0, 87500, 3, 6, 200000 }, +- { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 6, 200000 }, ++ { 1, 50000, ACPU_PLL_1, 1, 3, 6250, 3, 1, 61440 }, ++ { 1, 100000, ACPU_PLL_1, 1, 1, 12500, 3, 1, 61440 }, ++ { 1, 200000, ACPU_PLL_1, 1, 0, 25000, 3, 1, 61440 }, ++ { 1, 300000, ACPU_PLL_0, 4, 2, 37500, 3, 2, 122880 }, ++ { 1, 400000, ACPU_PLL_0, 4, 2, 50000, 3, 3, 122880 }, ++ { 1, 500000, ACPU_PLL_0, 4, 1, 62500, 3, 3, 122880 }, ++ { 1, 600000, ACPU_PLL_2, 2, 1, 75000, 3, 4, 160000 }, ++ { 1, 700000, ACPU_PLL_4, 6, 0, 87500, 3, 4, 160000 }, ++ { 1, 800000, ACPU_PLL_4, 6, 0, 100000, 3, 5, 160000 }, + { 1, 900000, ACPU_PLL_4, 6, 0, 112500, 3, 6, 200000 }, + { 1, 1000000, ACPU_PLL_4, 6, 0, 125000, 3, 7, 200000 }, + #ifdef CONFIG_MSM7X27A_OVERCLOCK + { 1, 1100000, ACPU_PLL_4, 6, 0, 137500, 3, 7, 200000 }, + { 1, 1200000, ACPU_PLL_4, 6, 0, 150000, 3, 7, 200000 }, + { 1, 1300000, ACPU_PLL_4, 6, 0, 162500, 3, 7, 200000 }, +-#if defined(CONFIG_MACH_MSM7X25A_V3) || defined(CONFIG_MACH_MSM7X25A_V1) + { 1, 1400000, ACPU_PLL_4, 6, 0, 175000, 3, 7, 200000 }, ++#ifdef CONFIG_MSM7X27A_CRAZYOVERCLOCK ++ { 1, 1500000, ACPU_PLL_4, 6, 0, 187500, 3, 7, 200000 }, ++ { 1, 1600000, ACPU_PLL_4, 6, 0, 200000, 3, 7, 200000 }, + #endif + #endif + { 0 } +@@ -631,26 +632,10 @@ static void acpuclk_set_div(const struct clkctl_acpu_speed *hunt_s) + { + uint32_t reg_clkctl, reg_clksel, clk_div, src_sel; + +-#ifdef CONFIG_MSM7X27A_OVERCLOCK +- uint32_t a11_div; +-#endif +- + reg_clksel = readl_relaxed(A11S_CLK_SEL_ADDR); + + /* AHB_CLK_DIV */ + clk_div = (reg_clksel >> 1) & 0x03; +-#ifdef CONFIG_MSM7X27A_OVERCLOCK +- a11_div = hunt_s->a11clk_src_div; +-#ifdef CONFIG_MACH_MSM7X25A_M4 +- if (hunt_s->a11clk_khz>800000) { +-#else +- if (hunt_s->a11clk_khz>1000000) { +-#endif +- a11_div = 0; +- writel(hunt_s->a11clk_khz/19200, MSM_CLK_CTL_BASE+0x33C); +- udelay(50); +- } +-#endif + /* CLK_SEL_SRC1NO */ + src_sel = reg_clksel & 1; + +@@ -668,11 +653,7 @@ static void acpuclk_set_div(const struct clkctl_acpu_speed *hunt_s) + reg_clkctl = readl_relaxed(A11S_CLK_CNTL_ADDR); + reg_clkctl &= ~(0xFF << (8 * src_sel)); + reg_clkctl |= hunt_s->a11clk_src_sel << (4 + 8 * src_sel); +-#ifdef CONFIG_MSM7X27A_OVERCLOCK +- reg_clkctl |= a11_div << (0 + 8 * src_sel); +-#else + reg_clkctl |= hunt_s->a11clk_src_div << (0 + 8 * src_sel); +-#endif + writel_relaxed(reg_clkctl, A11S_CLK_CNTL_ADDR); + + /* Program clock source selection */ +-- +2.10.1 + diff --git a/patchs/0002-configs-Update-MAX-MIN-of-7x25-7x27-processors.patch b/patchs/0002-configs-Update-MAX-MIN-of-7x25-7x27-processors.patch new file mode 100644 index 000000000000..fd3d5a1103b0 --- /dev/null +++ b/patchs/0002-configs-Update-MAX-MIN-of-7x25-7x27-processors.patch @@ -0,0 +1,144 @@ +From 96699cf014e5ca62ec24a05b7fc348b57007a6cb Mon Sep 17 00:00:00 2001 +From: Caio Oliveira +Date: Tue, 6 Dec 2016 12:52:17 -0200 +Subject: [PATCH 2/2] configs: Update MAX/MIN of 7x25/7x27 processors + +* L1II/L3II/L7 have a 7x27 procesor (1008MHz Max) +* L5 have a 7x25 processor (800MHz Max) +* Enable 7x25/7x27 processor overclock +* Enable 7x27 processor crazy overclock + +Signed-off-by: Caio Oliveira +--- + arch/arm/configs/cyanogenmod_m4_defconfig | 4 ++-- + arch/arm/configs/cyanogenmod_m4_nonfc_defconfig | 4 ++-- + arch/arm/configs/cyanogenmod_u0_8m_defconfig | 7 ++++--- + arch/arm/configs/cyanogenmod_u0_defconfig | 7 ++++--- + arch/arm/configs/cyanogenmod_u0_nonfc_defconfig | 7 ++++--- + arch/arm/configs/cyanogenmod_v1_defconfig | 7 ++++--- + arch/arm/configs/cyanogenmod_vee3_defconfig | 7 ++++--- + 7 files changed, 24 insertions(+), 19 deletions(-) + +diff --git a/arch/arm/configs/cyanogenmod_m4_defconfig b/arch/arm/configs/cyanogenmod_m4_defconfig +index cd9e36a..802a70c 100644 +--- a/arch/arm/configs/cyanogenmod_m4_defconfig ++++ b/arch/arm/configs/cyanogenmod_m4_defconfig +@@ -461,8 +461,8 @@ CONFIG_MSM_DALRPC=y + # CONFIG_MSM_DALRPC_TEST is not set + CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y + CONFIG_MSM_CPU_FREQ_MAX=800000 +-CONFIG_MSM_CPU_FREQ_MIN=61440 +-# CONFIG_MSM7X27A_OVERCLOCK is not set ++CONFIG_MSM_CPU_FREQ_MIN=50000 ++CONFIG_MSM7X27A_OVERCLOCK=y + # CONFIG_MSM_AVS_HW is not set + # CONFIG_MSM_HW3D is not set + CONFIG_MSM_ADSP=y +diff --git a/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig b/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig +index 6a89208..e5f5a09 100644 +--- a/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig ++++ b/arch/arm/configs/cyanogenmod_m4_nonfc_defconfig +@@ -461,8 +461,8 @@ CONFIG_MSM_DALRPC=y + # CONFIG_MSM_DALRPC_TEST is not set + CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y + CONFIG_MSM_CPU_FREQ_MAX=800000 +-CONFIG_MSM_CPU_FREQ_MIN=61440 +-# CONFIG_MSM7X27A_OVERCLOCK is not set ++CONFIG_MSM_CPU_FREQ_MIN=50000 ++CONFIG_MSM7X27A_OVERCLOCK=y + # CONFIG_MSM_AVS_HW is not set + # CONFIG_MSM_HW3D is not set + CONFIG_MSM_ADSP=y +diff --git a/arch/arm/configs/cyanogenmod_u0_8m_defconfig b/arch/arm/configs/cyanogenmod_u0_8m_defconfig +index eafd6ad..a08a65a 100644 +--- a/arch/arm/configs/cyanogenmod_u0_8m_defconfig ++++ b/arch/arm/configs/cyanogenmod_u0_8m_defconfig +@@ -459,9 +459,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y + CONFIG_MSM_DALRPC=y + # CONFIG_MSM_DALRPC_TEST is not set + CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y +-CONFIG_MSM_CPU_FREQ_MAX=1008000 +-CONFIG_MSM_CPU_FREQ_MIN=61440 +-# CONFIG_MSM7X27A_OVERCLOCK is not set ++CONFIG_MSM_CPU_FREQ_MAX=1000000 ++CONFIG_MSM_CPU_FREQ_MIN=50000 ++CONFIG_MSM7X27A_OVERCLOCK=y ++CONFIG_MSM7X27A_CRAZYOVERCLOCK=y + # CONFIG_MSM_AVS_HW is not set + # CONFIG_MSM_HW3D is not set + CONFIG_MSM_ADSP=y +diff --git a/arch/arm/configs/cyanogenmod_u0_defconfig b/arch/arm/configs/cyanogenmod_u0_defconfig +index d96b658..dfab126 100644 +--- a/arch/arm/configs/cyanogenmod_u0_defconfig ++++ b/arch/arm/configs/cyanogenmod_u0_defconfig +@@ -459,9 +459,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y + CONFIG_MSM_DALRPC=y + # CONFIG_MSM_DALRPC_TEST is not set + CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y +-CONFIG_MSM_CPU_FREQ_MAX=1008000 +-CONFIG_MSM_CPU_FREQ_MIN=61440 +-# CONFIG_MSM7X27A_OVERCLOCK is not set ++CONFIG_MSM_CPU_FREQ_MAX=1000000 ++CONFIG_MSM_CPU_FREQ_MIN=50000 ++CONFIG_MSM7X27A_OVERCLOCK=y ++CONFIG_MSM7X27A_CRAZYOVERCLOCK=y + # CONFIG_MSM_AVS_HW is not set + # CONFIG_MSM_HW3D is not set + CONFIG_MSM_ADSP=y +diff --git a/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig b/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig +index cfe2c69..75ece88 100644 +--- a/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig ++++ b/arch/arm/configs/cyanogenmod_u0_nonfc_defconfig +@@ -459,9 +459,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y + CONFIG_MSM_DALRPC=y + # CONFIG_MSM_DALRPC_TEST is not set + CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y +-CONFIG_MSM_CPU_FREQ_MAX=1008000 +-CONFIG_MSM_CPU_FREQ_MIN=61440 +-# CONFIG_MSM7X27A_OVERCLOCK is not set ++CONFIG_MSM_CPU_FREQ_MAX=1000000 ++CONFIG_MSM_CPU_FREQ_MIN=50000 ++CONFIG_MSM7X27A_OVERCLOCK=y ++CONFIG_MSM7X27A_CRAZYOVERCLOCK=y + # CONFIG_MSM_AVS_HW is not set + # CONFIG_MSM_HW3D is not set + CONFIG_MSM_ADSP=y +diff --git a/arch/arm/configs/cyanogenmod_v1_defconfig b/arch/arm/configs/cyanogenmod_v1_defconfig +index 7ba639b2..c584eec 100755 +--- a/arch/arm/configs/cyanogenmod_v1_defconfig ++++ b/arch/arm/configs/cyanogenmod_v1_defconfig +@@ -464,9 +464,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y + CONFIG_MSM_DALRPC=y + # CONFIG_MSM_DALRPC_TEST is not set + CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y +-CONFIG_MSM_CPU_FREQ_MAX=1008000 +-CONFIG_MSM_CPU_FREQ_MIN=61440 +-# CONFIG_MSM7X27A_OVERCLOCK is not set ++CONFIG_MSM_CPU_FREQ_MAX=1000000 ++CONFIG_MSM_CPU_FREQ_MIN=50000 ++CONFIG_MSM7X27A_OVERCLOCK=y ++CONFIG_MSM7X27A_CRAZYOVERCLOCK=y + # CONFIG_MSM_AVS_HW is not set + # CONFIG_MSM_HW3D is not set + CONFIG_MSM_ADSP=y +diff --git a/arch/arm/configs/cyanogenmod_vee3_defconfig b/arch/arm/configs/cyanogenmod_vee3_defconfig +index 97070e1..3278781 100755 +--- a/arch/arm/configs/cyanogenmod_vee3_defconfig ++++ b/arch/arm/configs/cyanogenmod_vee3_defconfig +@@ -463,9 +463,10 @@ CONFIG_MSM_RMT_STORAGE_CLIENT=y + CONFIG_MSM_DALRPC=y + # CONFIG_MSM_DALRPC_TEST is not set + CONFIG_MSM_CPU_FREQ_SET_MIN_MAX=y +-CONFIG_MSM_CPU_FREQ_MAX=1008000 +-CONFIG_MSM_CPU_FREQ_MIN=61440 +-# CONFIG_MSM7X27A_OVERCLOCK is not set ++CONFIG_MSM_CPU_FREQ_MAX=1000000 ++CONFIG_MSM_CPU_FREQ_MIN=50000 ++CONFIG_MSM7X27A_OVERCLOCK=y ++CONFIG_MSM7X27A_CRAZYOVERCLOCK=y + # CONFIG_MSM_AVS_HW is not set + # CONFIG_MSM_HW3D is not set + CONFIG_MSM_ADSP=y +-- +2.10.1 +