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On this pull request, I propose an SPI flash controller module exclusively for reading data or registers out of a flash device. Currently, it has:
_SPIFlashReaderBase: a base class from which can be inherited to create a new controller module, such as one that reads the ID of the flash device by issuing the opcode 0x9F (or 0x9E)
SPIFlashSlowReader: a module for normal reads from the device, meaning no dummy cycles of waiting is needed right after sending the address bytes to the device, while the read frequency is often capped.
SPIFlashFastReader: a module for "fast reads", meaning a faster frequency than normal reads while a number of dummy cycles of waiting is needed right after sending the address bytes.
Note that only the SlowReader but not the FastReader has been successfully tested on the ECP5 evaluation board.
In order to use the clock signal clk as the SPI clock for this module design, ECP5 requires the user NOT to request for SPI clock that corresponds to the on-chip oscillator (MCLK) but to instantiate a USRMCLK Instance. Therefore, to use this module and bulid the configuration bitstream on nextpnr without errors (see this comment), the user must avoid requesting for the normal clock pin from Ball U3 by some means. One way is to use my proposed modification of nmigen-boards.
I look forward to seeing further comments, thanks.
Comment by HarryHo90sHK Friday Jan 03, 2020 at 06:58 GMT
I factored out the USRMCLK primitive and fixed most of the styling on f87fa5e1e9614a30ee7b08ebb8e43e253854558e.
Currently test_spiflash.py only asserts whether the data read by the SPI readers match the memory content of a simulated SPI flash device; looking at the VCD is not necessary.
I haven't changed the nMigen version number lest it hasn't been finalised.
Issue by HarryHo90sHK
Monday Dec 23, 2019 at 08:38 GMT
Originally opened as m-labs/nmigen-stdio#2
On this pull request, I propose an SPI flash controller module exclusively for reading data or registers out of a flash device. Currently, it has:
_SPIFlashReaderBase
: a base class from which can be inherited to create a new controller module, such as one that reads the ID of the flash device by issuing the opcode0x9F
(or0x9E
)SPIFlashSlowReader
: a module for normal reads from the device, meaning no dummy cycles of waiting is needed right after sending the address bytes to the device, while the read frequency is often capped.SPIFlashFastReader
: a module for "fast reads", meaning a faster frequency than normal reads while a number of dummy cycles of waiting is needed right after sending the address bytes.Note that only the
SlowReader
but not theFastReader
has been successfully tested on the ECP5 evaluation board.In order to use the clock signal
clk
as the SPI clock for this module design, ECP5 requires the user NOT to request for SPI clock that corresponds to the on-chip oscillator (MCLK) but to instantiate a USRMCLK Instance. Therefore, to use this module and bulid the configuration bitstream on nextpnr without errors (see this comment), the user must avoid requesting for the normal clock pin from Ball U3 by some means. One way is to use my proposed modification of nmigen-boards.I look forward to seeing further comments, thanks.
HarryHo90sHK included the following code: https://github.com/m-labs/nmigen-stdio/pull/2/commits
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