perf_counter test might fail on processors with L4 cache

[miladfarca]

This line is currently failing on a powerpc (LE running RHEL) with a much lower value compared to the expectation:

highway/hwy/perf_counters_test.cc

Line 92 in fecd465

HWY_ASSERT(values[PerfCounters::kL3Loads] == 0.0 ||

i.e

values[PerfCounters::kL3Loads] = 50.72

The values array looks like this:

{0, 2680918956.7209449, 405940726.6087172, 162.43341942283425, 0, 0, 3.0080262856080417, 50.728248198644259, 0, 18730.659643699411, 0 <repeats 54 times>}

Since Power machines do have L4 cache I'm assuming setting PERF_COUNT_HW_CACHE_LL is measure the lowest level cache, being L4 rather than L3, which explains why the value is much lower than expected.

If this is true then we could ifdef the test and lower the number on PPC or even lower it globally for all platforms.

[miladfarca]

/cc @jan-wassenberg

[jan-wassenberg]

Thanks for pointing that out! I agree an L4 LLC would have fewer misses, we can reduce the threshold to 10 (vs your 50).

[miladfarca]

Thank you for making the PR.