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irq.asm
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.filenamespace irq
init:
sei // Prevent the CPU from responding to IRQ interrupt events
lda #$35
sta $01 // Disable ROM chars at $9000-$9fff. the cpu now sees RAM everywhere except at $d000-$e000, where still the registers of SID/VICII/etc are visible.
lda #<irq1
ldy #>irq1
sta $fffe
sty $ffff
lda #$01
sta $d01a // Enable raster interrupts
lda #$7f
sta $dc0d // Disable timer interrupts (which can be generated by the two CIA chips)
sta $dd0d
lda $dc0d // Cancel pending interrupts (by reading these two registers we negate any pending CIA irqs)
lda $dd0d // If we don't do this, a pending CIA irq might occur after we finish setting up our irq
lda #$1b // There are more than 256 rasterlines, the topmost bit of $d011 serves as the 9th bit for the rasterline we want our irq to be triggered
sta $d011 // Set up a character screen, leaving the topmost bit 0
lda #$01
sta $d019
cli // Re-enable interupts
rts
irq1:
pha; txa; pha; tya; pha
lda #$02
sta $dd00
lda #$3b
sta $d011 // Bitmap mode
lda #$18
sta $d016
lda #$78
sta $d018
jsr $1003 // Play music
jsr scrolltext.update
lda #<irq2
ldy #>irq2
sta $fffe
sty $ffff
lda #$e6
sta $d012 // Trigger next interrupt at rasterline $e6
lda #$01
sta $d019
pla; tay; pla; tax; pla
rti
irq2:
// Wait for border to remove jitter
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
pha; txa; pha; tya; pha
lda #$03
sta $dd00 // Change VIC bank
lda #$08
sta $d016
lda #$18 // number of $0400 chunks until the start of the address
sta $d018 // upper four bits = screen mem, lower four bits = char mem
lda #$1f
sta $d011 // Text mode
lda scrolltext.pixelscroll
sta $d016
lda #<irq1
ldy #>irq1
sta $fffe
sty $ffff
lda #$00
sta $d012
lda #$01
sta $d019
pla; tay; pla; tax; pla
rti