From 1eba9d8073f3f77c9325b92ed00f6b75555a671b Mon Sep 17 00:00:00 2001 From: Steven Perron Date: Tue, 3 Dec 2024 12:42:40 -0500 Subject: [PATCH 1/3] [SPIRV] Expand RWBuffer load and store from HLSL The code pattern that clang will generate for HLSL has changed from the original plan. This allows the SPIR-V backend to generate code for the current code generation. It looks for patterns of the form: ``` %1 = @llvm.spv.resource.handlefrombinding %2 = @llvm.spv.resource.getpointer(%1, index) load/store %2 ``` These three llvm-ir instruction are treated as a single unit that will 1. Generate or find the global variable identified by the call to `resource.handlefrombinding`. 2. Generate an OpLoad of the variable to get the handle to the image. 3. Generate an OpImageRead or OpImageWrite using that handle with the given index. This will generate the OpLoad in the same BB as the read/write. Note: Now that `resource.handlefrombinding` is not processed on its own, many existing tests had to be removed. We do not have intrinsics that are able to use handles to sampled images, input attachments, etc., so we cannot generate the load of the handle. These tests are removed for now, and will be added when those resource types are fully implemented. --- llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp | 17 +- llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp | 9 +- llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h | 2 +- .../Target/SPIRV/SPIRVInstructionSelector.cpp | 169 ++++++++++++++---- llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp | 6 +- .../SPIRV/hlsl-resources/BufferLoadStore.ll | 60 +++++++ .../SPIRV/hlsl-resources/BufferStore.ll | 3 +- .../CombinedSamplerImageDynIdx.ll | 40 ----- .../CombinedSamplerImageNonUniformIdx.ll | 47 ----- .../InputAttachmentImageDynIdx.ll | 39 ---- .../InputAttachmentImageNonUniformIdx.ll | 46 ----- .../hlsl-resources/SampledImageDynIdx.ll | 65 ------- .../SampledImageNonUniformIdx.ll | 46 ----- .../hlsl-resources/SamplerArrayDynIdx.ll | 38 ---- .../SamplerArrayNonUniformIdx.ll | 45 ----- .../hlsl-resources/ScalarResourceType.ll | 8 + .../hlsl-resources/StorageImageDynIdx.ll | 4 + .../StorageImageNonUniformIdx.ll | 4 + .../StorageTexelBufferDynIdx.ll | 39 ---- .../StorageTexelBufferNonUniformIdx.ll | 46 ----- .../UniformTexelBufferDynIdx.ll | 39 ---- .../UniformTexelBufferNonUniformIdx.ll | 46 ----- .../hlsl-resources/UnknownBufferStore.ll | 3 +- 23 files changed, 241 insertions(+), 580 deletions(-) create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp index d2b14d6d058c92..68f5fc9ee5975e 100644 --- a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp @@ -264,7 +264,14 @@ bool expectIgnoredInIRTranslation(const Instruction *I) { const auto *II = dyn_cast(I); if (!II) return false; - return II->getIntrinsicID() == Intrinsic::invariant_start; + switch (II->getIntrinsicID()) { + case Intrinsic::invariant_start: + case Intrinsic::spv_resource_handlefrombinding: + case Intrinsic::spv_resource_getpointer: + return true; + default: + return false; + } } bool allowEmitFakeUse(const Value *Arg) { @@ -725,6 +732,14 @@ Type *SPIRVEmitIntrinsics::deduceElementTypeHelper( if (Ty) break; } + } else if (auto *II = dyn_cast(I)) { + if (II->getIntrinsicID() == Intrinsic::spv_resource_getpointer) { + auto *ImageType = cast(II->getOperand(0)->getType()); + assert(ImageType->getTargetExtName() == "spirv.Image"); + Ty = ImageType->getTypeParameter(0); + // TODO: Need to look at the use to see if it needs to be a vector of the + // type. + } } else if (auto *CI = dyn_cast(I)) { static StringMap ResTypeByArg = { {"to_global", 0}, diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp index a06c62e68d1062..874894ae987268 100644 --- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp @@ -1114,9 +1114,12 @@ SPIRVGlobalRegistry::getSPIRVTypeForVReg(Register VReg, return nullptr; } -SPIRVType *SPIRVGlobalRegistry::getResultType(Register VReg) { - MachineInstr *Instr = getVRegDef(CurMF->getRegInfo(), VReg); - return getSPIRVTypeForVReg(Instr->getOperand(1).getReg()); +SPIRVType *SPIRVGlobalRegistry::getResultType(Register VReg, + MachineFunction *MF) { + if (!MF) + MF = CurMF; + MachineInstr *Instr = getVRegDef(MF->getRegInfo(), VReg); + return getSPIRVTypeForVReg(Instr->getOperand(1).getReg(), MF); } SPIRVType *SPIRVGlobalRegistry::getOrCreateSPIRVType( diff --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h index 528baf5f8d9e21..0c94ec4df97f54 100644 --- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h +++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h @@ -377,7 +377,7 @@ class SPIRVGlobalRegistry { const MachineFunction *MF = nullptr) const; // Return the result type of the instruction defining the register. - SPIRVType *getResultType(Register VReg); + SPIRVType *getResultType(Register VReg, MachineFunction *MF = nullptr); // Whether the given VReg has a SPIR-V type mapped to it yet. bool hasSPIRVTypeForVReg(Register VReg) const { diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp index b7b32dd0d626c6..eb8e629a0f7a28 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp @@ -276,8 +276,9 @@ class SPIRVInstructionSelector : public InstructionSelector { bool selectReadImageIntrinsic(Register &ResVReg, const SPIRVType *ResType, MachineInstr &I) const; - bool selectImageWriteIntrinsic(MachineInstr &I) const; + bool selectResourceGetPointer(Register &ResVReg, const SPIRVType *ResType, + MachineInstr &I) const; // Utilities std::pair @@ -307,10 +308,15 @@ class SPIRVInstructionSelector : public InstructionSelector { SPIRVType *widenTypeToVec4(const SPIRVType *Type, MachineInstr &I) const; bool extractSubvector(Register &ResVReg, const SPIRVType *ResType, Register &ReadReg, MachineInstr &InsertionPoint) const; + bool generateImageRead(Register &ResVReg, const SPIRVType *ResType, + Register ImageReg, Register IdxReg, DebugLoc Loc, + MachineInstr &Pos) const; bool BuildCOPY(Register DestReg, Register SrcReg, MachineInstr &I) const; bool loadVec3BuiltinInputID(SPIRV::BuiltIn::BuiltIn BuiltInValue, Register ResVReg, const SPIRVType *ResType, MachineInstr &I) const; + bool loadHandleBeforePosition(Register &HandleReg, const SPIRVType *ResType, + GIntrinsic &HandleDef, MachineInstr &Pos) const; }; } // end anonymous namespace @@ -1018,6 +1024,25 @@ bool SPIRVInstructionSelector::selectLoad(Register ResVReg, MachineInstr &I) const { unsigned OpOffset = isa(I) ? 1 : 0; Register Ptr = I.getOperand(1 + OpOffset).getReg(); + + auto *PtrDef = getVRegDef(*MRI, Ptr); + auto *IntPtrDef = dyn_cast(PtrDef); + if (IntPtrDef && + IntPtrDef->getIntrinsicID() == Intrinsic::spv_resource_getpointer) { + Register ImageReg = IntPtrDef->getOperand(2).getReg(); + Register NewImageReg = + MRI->createVirtualRegister(MRI->getRegClass(ImageReg)); + auto *ImageDef = cast(getVRegDef(*MRI, ImageReg)); + if (!loadHandleBeforePosition(NewImageReg, GR.getSPIRVTypeForVReg(ImageReg), + *ImageDef, I)) { + return false; + } + + Register IdxReg = IntPtrDef->getOperand(3).getReg(); + return generateImageRead(ResVReg, ResType, NewImageReg, IdxReg, + I.getDebugLoc(), I); + } + auto MIB = BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad)) .addDef(ResVReg) .addUse(GR.getSPIRVTypeID(ResType)) @@ -1037,6 +1062,29 @@ bool SPIRVInstructionSelector::selectStore(MachineInstr &I) const { unsigned OpOffset = isa(I) ? 1 : 0; Register StoreVal = I.getOperand(0 + OpOffset).getReg(); Register Ptr = I.getOperand(1 + OpOffset).getReg(); + + auto *PtrDef = getVRegDef(*MRI, Ptr); + auto *IntPtrDef = dyn_cast(PtrDef); + if (IntPtrDef && + IntPtrDef->getIntrinsicID() == Intrinsic::spv_resource_getpointer) { + Register ImageReg = IntPtrDef->getOperand(2).getReg(); + Register NewImageReg = + MRI->createVirtualRegister(MRI->getRegClass(ImageReg)); + auto *ImageDef = cast(getVRegDef(*MRI, ImageReg)); + if (!loadHandleBeforePosition(NewImageReg, GR.getSPIRVTypeForVReg(ImageReg), + *ImageDef, I)) { + return false; + } + + Register IdxReg = IntPtrDef->getOperand(3).getReg(); + return BuildMI(*I.getParent(), I, I.getDebugLoc(), + TII.get(SPIRV::OpImageWrite)) + .addUse(NewImageReg) + .addUse(IdxReg) + .addUse(StoreVal) + .constrainAllUses(TII, TRI, RBI); + } + MachineBasicBlock &BB = *I.getParent(); auto MIB = BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpStore)) .addUse(Ptr) @@ -3007,6 +3055,9 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg, case Intrinsic::spv_resource_load_typedbuffer: { return selectReadImageIntrinsic(ResVReg, ResType, I); } + case Intrinsic::spv_resource_getpointer: { + return selectResourceGetPointer(ResVReg, ResType, I); + } case Intrinsic::spv_discard: { return selectDiscard(ResVReg, ResType, I); } @@ -3024,27 +3075,7 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg, bool SPIRVInstructionSelector::selectHandleFromBinding(Register &ResVReg, const SPIRVType *ResType, MachineInstr &I) const { - - uint32_t Set = foldImm(I.getOperand(2), MRI); - uint32_t Binding = foldImm(I.getOperand(3), MRI); - uint32_t ArraySize = foldImm(I.getOperand(4), MRI); - Register IndexReg = I.getOperand(5).getReg(); - bool IsNonUniform = ArraySize > 1 && foldImm(I.getOperand(6), MRI); - - MachineIRBuilder MIRBuilder(I); - Register VarReg = buildPointerToResource(ResType, Set, Binding, ArraySize, - IndexReg, IsNonUniform, MIRBuilder); - - if (IsNonUniform) - buildOpDecorate(ResVReg, I, TII, SPIRV::Decoration::NonUniformEXT, {}); - - // TODO: For now we assume the resource is an image, which needs to be - // loaded to get the handle. That will not be true for storage buffers. - return BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpLoad)) - .addDef(ResVReg) - .addUse(GR.getSPIRVTypeID(ResType)) - .addUse(VarReg) - .constrainAllUses(TII, TRI, RBI); + return true; } bool SPIRVInstructionSelector::selectReadImageIntrinsic( @@ -3057,34 +3088,49 @@ bool SPIRVInstructionSelector::selectReadImageIntrinsic( // We will do that when we can, but for now trying to move forward with other // issues. Register ImageReg = I.getOperand(2).getReg(); - assert(MRI->getVRegDef(ImageReg)->getParent() == I.getParent() && - "The image must be loaded in the same basic block as its use."); + auto *ImageDef = cast(getVRegDef(*MRI, ImageReg)); + Register NewImageReg = MRI->createVirtualRegister(MRI->getRegClass(ImageReg)); + if (!loadHandleBeforePosition(NewImageReg, GR.getSPIRVTypeForVReg(ImageReg), + *ImageDef, I)) { + return false; + } + + Register IdxReg = I.getOperand(3).getReg(); + DebugLoc Loc = I.getDebugLoc(); + MachineInstr &Pos = I; + return generateImageRead(ResVReg, ResType, NewImageReg, IdxReg, Loc, Pos); +} + +bool SPIRVInstructionSelector::generateImageRead(Register &ResVReg, + const SPIRVType *ResType, + Register ImageReg, + Register IdxReg, DebugLoc Loc, + MachineInstr &Pos) const { uint64_t ResultSize = GR.getScalarOrVectorComponentCount(ResType); if (ResultSize == 4) { - return BuildMI(*I.getParent(), I, I.getDebugLoc(), - TII.get(SPIRV::OpImageRead)) + return BuildMI(*Pos.getParent(), Pos, Loc, TII.get(SPIRV::OpImageRead)) .addDef(ResVReg) .addUse(GR.getSPIRVTypeID(ResType)) .addUse(ImageReg) - .addUse(I.getOperand(3).getReg()) + .addUse(IdxReg) .constrainAllUses(TII, TRI, RBI); } - SPIRVType *ReadType = widenTypeToVec4(ResType, I); + SPIRVType *ReadType = widenTypeToVec4(ResType, Pos); Register ReadReg = MRI->createVirtualRegister(GR.getRegClass(ReadType)); bool Succeed = - BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpImageRead)) + BuildMI(*Pos.getParent(), Pos, Loc, TII.get(SPIRV::OpImageRead)) .addDef(ReadReg) .addUse(GR.getSPIRVTypeID(ReadType)) .addUse(ImageReg) - .addUse(I.getOperand(3).getReg()) + .addUse(IdxReg) .constrainAllUses(TII, TRI, RBI); if (!Succeed) return false; if (ResultSize == 1) { - return BuildMI(*I.getParent(), I, I.getDebugLoc(), + return BuildMI(*Pos.getParent(), Pos, Loc, TII.get(SPIRV::OpCompositeExtract)) .addDef(ResVReg) .addUse(GR.getSPIRVTypeID(ResType)) @@ -3092,7 +3138,25 @@ bool SPIRVInstructionSelector::selectReadImageIntrinsic( .addImm(0) .constrainAllUses(TII, TRI, RBI); } - return extractSubvector(ResVReg, ResType, ReadReg, I); + return extractSubvector(ResVReg, ResType, ReadReg, Pos); +} + +bool SPIRVInstructionSelector::selectResourceGetPointer( + Register &ResVReg, const SPIRVType *ResType, MachineInstr &I) const { +#ifdef ASSERT + // For now, the operand is an image. This will change once we start handling + // more resource types. + Register ResourcePtr = I.getOperand(2).getReg(); + SPIRVType *RegType = GR.getResultType(ResourcePtr); + assert(RegType->getOpcode() == SPIRV::OpTypeImage && + "Can only handle texel buffers for now."); +#endif + + // For texel buffers, the index into the image is part of the OpImageRead or + // OpImageWrite instructions. So we will do nothing in this case. This + // intrinsic will be combined with the load or store when selecting the load + // or store. + return true; } bool SPIRVInstructionSelector::extractSubvector( @@ -3144,15 +3208,20 @@ bool SPIRVInstructionSelector::selectImageWriteIntrinsic( // We will do that when we can, but for now trying to move forward with other // issues. Register ImageReg = I.getOperand(1).getReg(); - assert(MRI->getVRegDef(ImageReg)->getParent() == I.getParent() && - "The image must be loaded in the same basic block as its use."); + auto *ImageDef = cast(getVRegDef(*MRI, ImageReg)); + Register NewImageReg = MRI->createVirtualRegister(MRI->getRegClass(ImageReg)); + if (!loadHandleBeforePosition(NewImageReg, GR.getSPIRVTypeForVReg(ImageReg), + *ImageDef, I)) { + return false; + } + Register CoordinateReg = I.getOperand(2).getReg(); Register DataReg = I.getOperand(3).getReg(); assert(GR.getResultType(DataReg)->getOpcode() == SPIRV::OpTypeVector); assert(GR.getScalarOrVectorComponentCount(GR.getResultType(DataReg)) == 4); return BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpImageWrite)) - .addUse(ImageReg) + .addUse(NewImageReg) .addUse(CoordinateReg) .addUse(DataReg) .constrainAllUses(TII, TRI, RBI); @@ -3677,6 +3746,36 @@ SPIRVType *SPIRVInstructionSelector::widenTypeToVec4(const SPIRVType *Type, return GR.getOrCreateSPIRVVectorType(ScalarType, 4, MIRBuilder); } +bool SPIRVInstructionSelector::loadHandleBeforePosition( + Register &HandleReg, const SPIRVType *ResType, GIntrinsic &HandleDef, + MachineInstr &Pos) const { + + assert(HandleDef.getIntrinsicID() == + Intrinsic::spv_resource_handlefrombinding); + uint32_t Set = foldImm(HandleDef.getOperand(2), MRI); + uint32_t Binding = foldImm(HandleDef.getOperand(3), MRI); + uint32_t ArraySize = foldImm(HandleDef.getOperand(4), MRI); + Register IndexReg = HandleDef.getOperand(5).getReg(); + bool IsNonUniform = ArraySize > 1 && foldImm(HandleDef.getOperand(6), MRI); + + MachineIRBuilder MIRBuilder(HandleDef); + Register VarReg = buildPointerToResource(ResType, Set, Binding, ArraySize, + IndexReg, IsNonUniform, MIRBuilder); + + if (IsNonUniform) + buildOpDecorate(HandleReg, HandleDef, TII, SPIRV::Decoration::NonUniformEXT, + {}); + + // TODO: For now we assume the resource is an image, which needs to be + // loaded to get the handle. That will not be true for storage buffers. + return BuildMI(*Pos.getParent(), Pos, HandleDef.getDebugLoc(), + TII.get(SPIRV::OpLoad)) + .addDef(HandleReg) + .addUse(GR.getSPIRVTypeID(ResType)) + .addUse(VarReg) + .constrainAllUses(TII, TRI, RBI); +} + namespace llvm { InstructionSelector * createSPIRVInstructionSelector(const SPIRVTargetMachine &TM, diff --git a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp index 020c11a3af4e16..fee22e751a50f4 100644 --- a/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp @@ -1696,14 +1696,16 @@ void addInstrRequirements(const MachineInstr &MI, break; case SPIRV::OpImageRead: { Register ImageReg = MI.getOperand(2).getReg(); - SPIRVType *TypeDef = ST.getSPIRVGlobalRegistry()->getResultType(ImageReg); + SPIRVType *TypeDef = ST.getSPIRVGlobalRegistry()->getResultType( + ImageReg, const_cast(MI.getMF())); if (isImageTypeWithUnknownFormat(TypeDef)) Reqs.addCapability(SPIRV::Capability::StorageImageReadWithoutFormat); break; } case SPIRV::OpImageWrite: { Register ImageReg = MI.getOperand(0).getReg(); - SPIRVType *TypeDef = ST.getSPIRVGlobalRegistry()->getResultType(ImageReg); + SPIRVType *TypeDef = ST.getSPIRVGlobalRegistry()->getResultType( + ImageReg, const_cast(MI.getMF())); if (isImageTypeWithUnknownFormat(TypeDef)) Reqs.addCapability(SPIRV::Capability::StorageImageWriteWithoutFormat); break; diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll new file mode 100644 index 00000000000000..25dcc90cb61cda --- /dev/null +++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferLoadStore.ll @@ -0,0 +1,60 @@ +; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv-vulkan-library %s -o - | FileCheck %s +; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-library %s -o - -filetype=obj | spirv-val %} + +; CHECK-DAG: [[float:%[0-9]+]] = OpTypeFloat 32 +; CHECK-DAG: [[v4float:%[0-9]+]] = OpTypeVector [[float]] 4 +; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 +; CHECK-DAG: [[zero:%[0-9]+]] = OpConstant [[int]] 0 +; CHECK-DAG: [[one:%[0-9]+]] = OpConstant [[int]] 1 +; CHECK-DAG: [[twenty:%[0-9]+]] = OpConstant [[int]] 20 +; CHECK-DAG: [[twenty_three:%[0-9]+]] = OpConstant [[int]] 23 +; CHECK-DAG: [[ImageType:%[0-9]+]] = OpTypeImage [[float]] Buffer 2 0 0 2 Rgba32f +; CHECK-DAG: [[ImagePtr:%[0-9]+]] = OpTypePointer UniformConstant [[ImageType]] +; CHECK: [[Var:%[0-9]+]] = OpVariable [[ImagePtr]] UniformConstant + +; Function Attrs: mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) +define void @main() local_unnamed_addr #0 { +entry: +; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]] + %s_h.i = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false) + +; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[one]] +; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0 + %0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 1) + %1 = load float, ptr %0, align 4 +; CHECK: OpBranch [[bb_store:%[0-9]+]] + br label %bb_store + +; CHECK: [[bb_store]] = OpLabel +bb_store: + +; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]] +; CHECK: OpImageWrite [[H]] [[zero]] [[V]] + %2 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 0) + store float %1, ptr %2, align 4 +; CHECK: OpBranch [[bb_both:%[0-9]+]] + br label %bb_both + +; CHECK: [[bb_both]] = OpLabel +bb_both: +; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]] +; CHECK: [[R:%[0-9]+]] = OpImageRead [[v4float]] [[H]] [[twenty_three]] +; CHECK: [[V:%[0-9]+]] = OpCompositeExtract [[float]] [[R]] 0 + %3 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 23) + %4 = load float, ptr %3, align 4 + +; CHECK: [[H:%[0-9]+]] = OpLoad [[ImageType]] [[Var]] +; CHECK: OpImageWrite [[H]] [[twenty]] [[V]] + %5 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1) %s_h.i, i32 20) + store float %4, ptr %5, align 4 + ret void +} + +; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none) +declare ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 1), i32) #1 + +; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(none) +declare target("spirv.Image", float, 5, 2, 0, 0, 2, 1) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32, i32, i32, i32, i1) #1 + +attributes #0 = { mustprogress nofree noinline norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } +attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(none) } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll index b0ffa01ccdd44d..812e20e45565bc 100644 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll +++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/BufferStore.ll @@ -20,13 +20,14 @@ declare <4 x i32> @get_data() #1 ; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} ; CHECK-NEXT: OpLabel define void @RWBufferStore_Vec4_I32() #0 { -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]] %buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_i32_5_2_0_0_2_24( i32 16, i32 7, i32 1, i32 0, i1 false) ; CHECK: [[data:%[0-9]+]] = OpFunctionCall %data = call <4 x i32> @get_data() + +; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]] ; CHECK: OpImageWrite [[buffer]] [[zero]] [[data]] call void @llvm.spv.resource.store.typedbuffer(target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) %buffer0, i32 0, <4 x i32> %data) diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll deleted file mode 100644 index 97a7252eb067b6..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageDynIdx.ll +++ /dev/null @@ -1,40 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK-NEXT: OpCapability SampledImageArrayDynamicIndexing -; CHECK-NEXT: OpCapability Sampled1D -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] 1D 2 0 0 1 R32i {{$}} -; CHECK-DAG: [[CombindedType:%[0-9]+]] = OpTypeSampledImage [[BufferType]] -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[CombindedType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One:%[0-9]+]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero:%[0-9]+]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[CombindedType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[CombindedType]] [[ac]] - %buffer0 = call target("spirv.SampledImage", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 0, i1 false) - -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[CombindedType]] [[ac]] - %buffer1 = call target("spirv.SampledImage", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 1, i1 false) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll deleted file mode 100644 index 6c5c126e4462b6..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/CombinedSamplerImageNonUniformIdx.ll +++ /dev/null @@ -1,47 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK: OpCapability ShaderNonUniform -; CHECK-NEXT: OpCapability SampledImageArrayNonUniformIndexing -; CHECK-NEXT: OpCapability Sampled1D -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 -; CHECK: OpDecorate [[Zero:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[One:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac1:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld1:%[0-9]+]] NonUniform - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] 1D 2 0 0 1 R32i {{$}} -; CHECK-DAG: [[CombindedType:%[0-9]+]] = OpTypeSampledImage [[BufferType]] -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[CombindedType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[CombindedType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac0]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[ld0:%[0-9]+]] = OpLoad [[CombindedType]] [[ac0]] - %buffer0 = call target("spirv.SampledImage", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 0, i1 true) - -; CHECK: [[ac1]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[ld1]] = OpLoad [[CombindedType]] [[ac1]] - %buffer1 = call target("spirv.SampledImage", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 1, i1 true) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll deleted file mode 100644 index 2a52dd1817f0cf..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageDynIdx.ll +++ /dev/null @@ -1,39 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK-NEXT: OpCapability InputAttachmentArrayDynamicIndexing -; SCHECK-NEXT: OpCapability InputAttachment -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] SubpassData 2 0 0 2 Unknown {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One:%[0-9]+]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero:%[0-9]+]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer0 = call target("spirv.Image", i32, 6, 2, 0, 0, 2, 0) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_6_2_0_0_2_0( - i32 3, i32 4, i32 3, i32 0, i1 false) - -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer1 = call target("spirv.Image", i32, 6, 2, 0, 0, 2, 0) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_6_2_0_0_2_0( - i32 3, i32 4, i32 3, i32 1, i1 false) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll deleted file mode 100644 index 6dae79c5b385d3..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/InputAttachmentImageNonUniformIdx.ll +++ /dev/null @@ -1,46 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK-NEXT: OpCapability ShaderNonUniformEXT -; CHECK-NEXT: OpCapability InputAttachmentArrayNonUniformIndexing -; SCHECK-NEXT: OpCapability InputAttachment -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 -; CHECK: OpDecorate [[Zero:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[One:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac1:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld1:%[0-9]+]] NonUniform - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] SubpassData 2 0 0 2 Unknown {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac0]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[ld0]] = OpLoad [[BufferType]] [[ac0]] - %buffer0 = call target("spirv.Image", i32, 6, 2, 0, 0, 2, 0) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_6_2_0_0_2_0( - i32 3, i32 4, i32 3, i32 0, i1 true) - -; CHECK: [[ac1:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[ld1]] = OpLoad [[BufferType]] [[ac1]] - %buffer1 = call target("spirv.Image", i32, 6, 2, 0, 0, 2, 0) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_6_2_0_0_2_0( - i32 3, i32 4, i32 3, i32 1, i1 true) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll deleted file mode 100644 index efd89c5977f970..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageDynIdx.ll +++ /dev/null @@ -1,65 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK-NEXT: OpCapability SampledImageArrayDynamicIndexing -; CHECK-NEXT: OpCapability Sampled1D -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 -; CHECK-DAG: OpDecorate [[OtherVar:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[OtherVar]] Binding 4 - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] 1D 2 0 0 1 R32i {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One:%[0-9]+]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero:%[0-9]+]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK-DAG: [[OtherArraySize:%[0-9]+]] = OpConstant [[int]] 5 -; CHECK-DAG: [[OtherBufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[OtherArraySize]] -; CHECK-DAG: [[OtherArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[OtherBufferArrayType]] -; CHECK-DAG: [[OtherVar]] = OpVariable [[OtherArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 0, i1 false) - -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 1, i1 false) - ret void -} - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @DifferentArraySizesAreDifferentVariables() #0 { -; Make sure we use different variables when the array sizes are different -; same in case one function calls the other. -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 0, i1 false) - -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[OtherVar]] [[One]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 5, i32 1, i1 false) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll deleted file mode 100644 index 6d93051ce3f0a0..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/SampledImageNonUniformIdx.ll +++ /dev/null @@ -1,46 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK-NEXT: OpCapability ShaderNonUniformEXT -; CHECK-NEXT: OpCapability SampledImageArrayNonUniformIndexing -; CHECK-NEXT: OpCapability Sampled1D -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 -; CHECK: OpDecorate [[Zero:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[One:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac1:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld1:%[0-9]+]] NonUniform - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] 1D 2 0 0 1 R32i {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac0]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[ld0]] = OpLoad [[BufferType]] [[ac0]] - %buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 0, i1 true) - -; CHECK: [[ac1:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[ld1]] = OpLoad [[BufferType]] [[ac1]] - %buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 1, i1 true) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll deleted file mode 100644 index fd276e9ef4a986..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayDynIdx.ll +++ /dev/null @@ -1,38 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK-NEXT: OpCapability SampledImageArrayDynamicIndexing -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[SamplerType:%[0-9]+]] = OpTypeSampler -; CHECK-DAG: [[SamplerPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[SamplerType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One:%[0-9]+]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero:%[0-9]+]] = OpConstant [[int]] 0 -; CHECK-DAG: [[SamplerArrayType:%[0-9]+]] = OpTypeArray [[SamplerType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[SamplerArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[SamplerPtrType]] [[Var]] [[Zero]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[SamplerType]] [[ac]] - %buffer0 = call target("spirv.Sampler") - @llvm.spv.resource.handlefrombinding.tspirv.Image( - i32 3, i32 4, i32 3, i32 0, i1 false) - -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[SamplerPtrType]] [[Var]] [[One]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[SamplerType]] [[ac]] - %buffer1 = call target("spirv.Sampler") - @llvm.spv.resource.handlefrombinding.tspirv.Image( - i32 3, i32 4, i32 3, i32 1, i1 false) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll deleted file mode 100644 index 3e59d66febf0b5..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/SamplerArrayNonUniformIdx.ll +++ /dev/null @@ -1,45 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; CHECK-NEXT: ShaderNonUniform -; CHECK-NEXT: OpCapability SampledImageArrayNonUniformIndexing -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 -; CHECK: OpDecorate [[Zero:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[One:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac1:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld1:%[0-9]+]] NonUniform - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[SamplerType:%[0-9]+]] = OpTypeSampler -; CHECK-DAG: [[SamplerPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[SamplerType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero]] = OpConstant [[int]] 0 -; CHECK-DAG: [[SamplerArrayType:%[0-9]+]] = OpTypeArray [[SamplerType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[SamplerArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac0]] = OpAccessChain [[SamplerPtrType]] [[Var]] [[Zero]] -; CHECK: [[ld0]] = OpLoad [[SamplerType]] [[ac0]] - %buffer0 = call target("spirv.Sampler") - @llvm.spv.resource.handlefrombinding.tspirv.Image( - i32 3, i32 4, i32 3, i32 0, i1 true) - -; CHECK: [[ac1:%[0-9]+]] = OpAccessChain [[SamplerPtrType]] [[Var]] [[One]] -; CHECK: [[ld1]] = OpLoad [[SamplerType]] [[ac1]] - %buffer1 = call target("spirv.Sampler") - @llvm.spv.resource.handlefrombinding.tspirv.Image( - i32 3, i32 4, i32 3, i32 1, i1 true) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll index 52cc2275bc7a6e..f52fd44bf38016 100644 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll +++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/ScalarResourceType.ll @@ -22,12 +22,16 @@ define void @RWBufferLoad() #0 { %buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24( i32 16, i32 7, i32 1, i32 0, i1 false) + %ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) %buffer0, i32 0) + store i32 0, ptr %ptr0, align 4 ; Make sure we use the same variable with multiple loads. ; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]] %buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24( i32 16, i32 7, i32 1, i32 0, i1 false) + %ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) %buffer1, i32 0) + store i32 0, ptr %ptr1, align 4 ret void } @@ -40,6 +44,8 @@ define void @UseDifferentGlobalVar() #0 { %buffer0 = call target("spirv.Image", float, 5, 2, 0, 0, 2, 3) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_3( i32 16, i32 7, i32 1, i32 0, i1 false) + %ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", float, 5, 2, 0, 0, 2, 3) %buffer0, i32 0) + store float 0.0, ptr %ptr0, align 4 ret void } @@ -52,6 +58,8 @@ define void @ReuseGlobalVarFromFirstFunction() #0 { %buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24( i32 16, i32 7, i32 1, i32 0, i1 false) + %ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) %buffer1, i32 0) + store i32 0, ptr %ptr1, align 4 ret void } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll index 082a5c832f1c4c..94ebe74148b952 100644 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll +++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageDynIdx.ll @@ -27,12 +27,16 @@ define void @main() #0 { %buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24( i32 3, i32 4, i32 3, i32 0, i1 false) + %ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer0, i32 0) + store i32 0, ptr %ptr0, align 4 ; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] ; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] %buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24( i32 3, i32 4, i32 3, i32 1, i1 false) + %ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer1, i32 0) + store i32 0, ptr %ptr1, align 4 ret void } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll index d6419492bb9529..f9466e431c19ce 100644 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll +++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageImageNonUniformIdx.ll @@ -34,12 +34,16 @@ define void @main() #0 { %buffer0 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24( i32 3, i32 4, i32 3, i32 0, i1 true) + %ptr0 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer0, i32 0) + store i32 0, ptr %ptr0, align 4 ; CHECK: [[ac1:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] ; CHECK: [[ld1]] = OpLoad [[BufferType]] [[ac1]] %buffer1 = call target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_0_2_0_0_2_24( i32 3, i32 4, i32 3, i32 1, i1 true) + %ptr1 = tail call noundef nonnull align 4 dereferenceable(4) ptr @llvm.spv.resource.getpointer.p0.tspirv.Image_f32_5_2_0_0_2_0t(target("spirv.Image", i32, 0, 2, 0, 0, 2, 24) %buffer1, i32 0) + store i32 0, ptr %ptr1, align 4 ret void } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll deleted file mode 100644 index 31fdcb362eb739..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferDynIdx.ll +++ /dev/null @@ -1,39 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; SCHECK-NEXT: OpCapability ImageBuffer -; CHECK-NEXT: OpCapability StorageTexelBufferArrayDynamicIndexing -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] Buffer 2 0 0 2 R32i {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One:%[0-9]+]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero:%[0-9]+]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @void() #0 { -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24( - i32 3, i32 4, i32 3, i32 0, i1 false) - -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24( - i32 3, i32 4, i32 3, i32 1, i1 false) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll deleted file mode 100644 index a5608979025fe1..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/StorageTexelBufferNonUniformIdx.ll +++ /dev/null @@ -1,46 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; SCHECK-NEXT: OpCapability ImageBuffer -; CHECK-NEXT: OpCapability ShaderNonUniformEXT -; CHECK-NEXT: OpCapability StorageTexelBufferArrayNonUniformIndexingEXT -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 -; CHECK: OpDecorate [[Zero:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[One:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac1:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld1:%[0-9]+]] NonUniform - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] Buffer 2 0 0 2 R32i {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac0]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[ld0]] = OpLoad [[BufferType]] [[ac0]] - %buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24( - i32 3, i32 4, i32 3, i32 0, i1 true) - -; CHECK: [[ac1:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[ld1]] = OpLoad [[BufferType]] [[ac1]] - %buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_24( - i32 3, i32 4, i32 3, i32 1, i1 true) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll deleted file mode 100644 index 131a6b38d393e1..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferDynIdx.ll +++ /dev/null @@ -1,39 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; SCHECK-NEXT: OpCapability SampledBuffer -; CHECK-NEXT: OpCapability UniformTexelBufferArrayDynamicIndexing -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] Buffer 2 0 0 1 R32i {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One:%[0-9]+]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero:%[0-9]+]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 0, i1 false) - -; CHECK: [[ac:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[BufferType]] [[ac]] - %buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 1, i1 false) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll deleted file mode 100644 index cfb3eb5f520764..00000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UniformTexelBufferNonUniformIdx.ll +++ /dev/null @@ -1,46 +0,0 @@ -; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.5-vulkan-library %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.5-vulkan-library %s -o - -filetype=obj | spirv-val %} - -; CHECK: OpCapability Shader -; SCHECK-NEXT: OpCapability SampledBuffer -; CHECK-NEXT: OpCapability ShaderNonUniformEXT -; CHECK-NEXT: OpCapability UniformTexelBufferArrayNonUniformIndexing -; CHECK-NOT: OpCapability - -; CHECK-DAG: OpDecorate [[Var:%[0-9]+]] DescriptorSet 3 -; CHECK-DAG: OpDecorate [[Var]] Binding 4 -; CHECK: OpDecorate [[Zero:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld0:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[One:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ac1:%[0-9]+]] NonUniform -; CHECK: OpDecorate [[ld1:%[0-9]+]] NonUniform - -; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0 -; CHECK-DAG: [[BufferType:%[0-9]+]] = OpTypeImage [[int]] Buffer 2 0 0 1 R32i {{$}} -; CHECK-DAG: [[BufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferType]] -; CHECK-DAG: [[ArraySize:%[0-9]+]] = OpConstant [[int]] 3 -; CHECK-DAG: [[One]] = OpConstant [[int]] 1 -; CHECK-DAG: [[Zero]] = OpConstant [[int]] 0 -; CHECK-DAG: [[BufferArrayType:%[0-9]+]] = OpTypeArray [[BufferType]] [[ArraySize]] -; CHECK-DAG: [[ArrayPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[BufferArrayType]] -; CHECK-DAG: [[Var]] = OpVariable [[ArrayPtrType]] UniformConstant - -; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} -; CHECK-NEXT: OpLabel -define void @main() #0 { -; CHECK: [[ac0]] = OpAccessChain [[BufferPtrType]] [[Var]] [[Zero]] -; CHECK: [[ld0]] = OpLoad [[BufferType]] [[ac0]] - %buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 0, i1 true) - -; CHECK: [[ac1:%[0-9]+]] = OpAccessChain [[BufferPtrType]] [[Var]] [[One]] -; CHECK: [[ld1]] = OpLoad [[BufferType]] [[ac1]] - %buffer1 = call target("spirv.Image", i32, 5, 2, 0, 0, 1, 24) - @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_1_24( - i32 3, i32 4, i32 3, i32 1, i1 true) - ret void -} - -attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" } diff --git a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll index 4c6f9bfd97ed7b..a4123c36a44888 100644 --- a/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll +++ b/llvm/test/CodeGen/SPIRV/hlsl-resources/UnknownBufferStore.ll @@ -18,13 +18,14 @@ declare <4 x i32> @get_data() #1 ; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}} ; CHECK-NEXT: OpLabel define void @RWBufferLoad_Vec4_I32() #0 { -; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]] %buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0( i32 16, i32 7, i32 1, i32 0, i1 false) ; CHECK: [[data:%[0-9]+]] = OpFunctionCall %data = call <4 x i32> @get_data() + +; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]] ; CHECK: OpImageWrite [[buffer]] [[ten]] [[data]] call void @llvm.spv.resource.store.typedbuffer( target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) %buffer0, i32 10, <4 x i32> %data) From 16ee762e6151ac75cb5a86d605be2d767dd80e6d Mon Sep 17 00:00:00 2001 From: Steven Perron Date: Mon, 13 Jan 2025 14:51:29 -0500 Subject: [PATCH 2/3] Move type deduction for getpointer into `CallInst` case. --- llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp index 68f5fc9ee5975e..c62961f435fb99 100644 --- a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp @@ -732,14 +732,6 @@ Type *SPIRVEmitIntrinsics::deduceElementTypeHelper( if (Ty) break; } - } else if (auto *II = dyn_cast(I)) { - if (II->getIntrinsicID() == Intrinsic::spv_resource_getpointer) { - auto *ImageType = cast(II->getOperand(0)->getType()); - assert(ImageType->getTargetExtName() == "spirv.Image"); - Ty = ImageType->getTypeParameter(0); - // TODO: Need to look at the use to see if it needs to be a vector of the - // type. - } } else if (auto *CI = dyn_cast(I)) { static StringMap ResTypeByArg = { {"to_global", 0}, @@ -750,9 +742,16 @@ Type *SPIRVEmitIntrinsics::deduceElementTypeHelper( {"__spirv_GenericCastToPtr_ToPrivate", 0}, {"__spirv_GenericCastToPtrExplicit_ToGlobal", 0}, {"__spirv_GenericCastToPtrExplicit_ToLocal", 0}, - {"__spirv_GenericCastToPtrExplicit_ToPrivate", 0}}; + {"__spirv_GenericCastToPtrExplicit_ToPrivate", 0}, + {"llvm.spv.resource.getpointer", 0}}; // TODO: maybe improve performance by caching demangled names - if (Function *CalledF = CI->getCalledFunction()) { + + auto *II = dyn_cast(I); + if (II && II->getIntrinsicID() == Intrinsic::spv_resource_getpointer) { + auto *ImageType = cast(II->getOperand(0)->getType()); + assert(ImageType->getTargetExtName() == "spirv.Image"); + Ty = ImageType->getTypeParameter(0); + } else if (Function *CalledF = CI->getCalledFunction()) { std::string DemangledName = getOclOrSpirvBuiltinDemangledName(CalledF->getName()); if (DemangledName.length() > 0) From 99c23ca71ad41cb68e1e0e504bc4174a29d69838 Mon Sep 17 00:00:00 2001 From: Steven Perron Date: Tue, 14 Jan 2025 09:50:17 -0500 Subject: [PATCH 3/3] Remove unused table entry. --- llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp index c62961f435fb99..1c1acd29ee0e6a 100644 --- a/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp @@ -742,8 +742,7 @@ Type *SPIRVEmitIntrinsics::deduceElementTypeHelper( {"__spirv_GenericCastToPtr_ToPrivate", 0}, {"__spirv_GenericCastToPtrExplicit_ToGlobal", 0}, {"__spirv_GenericCastToPtrExplicit_ToLocal", 0}, - {"__spirv_GenericCastToPtrExplicit_ToPrivate", 0}, - {"llvm.spv.resource.getpointer", 0}}; + {"__spirv_GenericCastToPtrExplicit_ToPrivate", 0}}; // TODO: maybe improve performance by caching demangled names auto *II = dyn_cast(I);