From cc7e9e34a9faa5627db0d36b49c9dd90f07cbf40 Mon Sep 17 00:00:00 2001
From: Aleksander Kaminski <aleksander.kaminski@phoenix-rtos.com>
Date: Mon, 16 Dec 2024 15:12:59 +0100
Subject: [PATCH] MCXN94x: Handle selection of CPU1 (cc flags + define)

JIRA: RTOS-988
---
 target/armv8m.mk | 18 +++++++++++++++---
 1 file changed, 15 insertions(+), 3 deletions(-)

diff --git a/target/armv8m.mk b/target/armv8m.mk
index efd4065d..31e2c335 100644
--- a/target/armv8m.mk
+++ b/target/armv8m.mk
@@ -15,17 +15,29 @@ CXX := $(CROSS)g++
 OLVL ?= -O2
 CFLAGS += -mthumb -fomit-frame-pointer -mno-unaligned-access
 
-# TODO hard float perhaps? To be decided
-CFLAGS += -mcpu=cortex-m33 -mfloat-abi=soft -fstack-usage
+# soft FPU for now, no support in kernel for hard FPU
+CFLAGS += -mfloat-abi=soft -fstack-usage
+
+MCX_USE_CPU1 ?= n
+
+ifeq ($(MCX_USE_CPU1), y)
+  CFLAGS += -mcpu=cortex-m33+nodsp
+else
+  CFLAGS += -mcpu=cortex-m33
+endif
 
 VADDR_KERNEL_INIT := $(KERNEL_PHADDR)
 
 LDFLAGS := -Wl,-z,max-page-size=0x10
 
 ifeq ($(KERNEL), 1)
-  CFLAGS += -ffixed-r9
+  CFLAGS += -ffixed-r9 -DMCX_USE_CPU1
   LDFLAGS += -Tbss=20000000 -Tdata=20000000
   STRIP := $(CROSS)strip
+
+  ifeq ($(MCX_USE_CPU1), y)
+    CFLAGS += -DMCX_USE_CPU1
+  endif
 else
   CFLAGS += -fpic -fpie -msingle-pic-base -mno-pic-data-is-text-relative
   # output .rel.* sections to make ELF position-independent