Feature/fmac

.gitignore

@@ -11,3 +11,10 @@ template-project
 template-project.bin
 template-project.hex
 template-project.map
+
+#vscode 
+.vscode
+.cproject
+.cache
+CMakeLists.txt
+template-project.code-workspace

Core/Inc/stm32h7xx_it.h

@@ -64,6 +64,10 @@ void DMA1_Stream3_IRQHandler(void);
 void DMA1_Stream4_IRQHandler(void);
 void DMA1_Stream5_IRQHandler(void);
 void DMA1_Stream6_IRQHandler(void);
+void DMA2_Stream0_IRQHandler(void);
+void DMA2_Stream1_IRQHandler(void);
+void DMA2_Stream2_IRQHandler(void);
+void FMAC_IRQHandler(void);
 void TIM2_IRQHandler(void);
 void I2C2_EV_IRQHandler(void);
 void TIM8_TRG_COM_TIM14_IRQHandler(void);

Core/Src/Runes/Runes.hpp

@@ -8,6 +8,9 @@ DMA_HandleTypeDef hdma_spi3_rx;
 DMA_HandleTypeDef hdma_spi3_tx;
 DMA_HandleTypeDef hdma_i2c2_rx;
 DMA_HandleTypeDef hdma_i2c2_tx;
+DMA_HandleTypeDef hdma_fmac_preload;
+DMA_HandleTypeDef hdma_fmac_read;
+DMA_HandleTypeDef hdma_fmac_write;
 I2C_HandleTypeDef hi2c2;
 ADC_HandleTypeDef hadc1;
 ADC_HandleTypeDef hadc2;
@@ -33,6 +36,7 @@ UART_HandleTypeDef huart2;
 UART_HandleTypeDef huart3;
 SPI_HandleTypeDef hspi3;
 FDCAN_HandleTypeDef hfdcan1;
+FMAC_HandleTypeDef hfmac;
 
 
 /************************************************
@@ -67,10 +71,10 @@ unordered_map<FDCAN_HandleTypeDef*, FDCAN::Instance*> FDCAN::handle_to_fdcan = {
 
 SPI::Instance SPI::instance3 = { .SCK = &PC10, .MOSI = &PC12, .MISO = &PC11, .SS = &PD0,
                                  .hspi = &hspi3, .instance = SPI3,
-								 .hdma_tx = DMA::Stream::DMA1Stream5,
+								 /*.hdma_tx = DMA::Stream::DMA1Stream5,
 								 .hdma_rx = DMA::Stream::DMA1Stream6,
 								 .baud_rate_prescaler = SPI_BAUDRATEPRESCALER_256,
-								 .mode = SPI_MODE_SLAVE,
+								 .mode = SPI_MODE_SLAVE,*/
                                };
 
 SPI::Peripheral SPI::spi3 = SPI::Peripheral::peripheral3;
@@ -304,3 +308,15 @@ unordered_map<uint32_t, uint32_t> I2C::available_speed_frequencies = {
 	{100, 0x60404E72}
 };
 #endif
+
+/************************************************
+ *					   FMAC
+ ***********************************************/
+
+#ifdef HAL_FMAC_MODULE_ENABLED
+
+MultiplierAccelerator::FMACInstance MultiplierAccelerator::Instance = { 
+	.hfmac = &hfmac, 
+	.dma_preload = DMA::Stream::DMA2Stream0, .dma_read = DMA::Stream::DMA2Stream1, .dma_write = DMA::Stream::DMA2Stream2,};
+#endif
+

Core/Src/stm32h7xx_hal_msp.c

@@ -33,6 +33,10 @@ extern DMA_HandleTypeDef hdma_i2c2_rx;
 
 extern DMA_HandleTypeDef hdma_i2c2_tx;
 
+extern DMA_HandleTypeDef hdma_fmac_preload;
+extern DMA_HandleTypeDef hdma_fmac_read;
+extern DMA_HandleTypeDef hdma_fmac_write;
+
 extern DMA_HandleTypeDef hdma_spi3_rx;
 
 extern DMA_HandleTypeDef hdma_spi3_tx;
@@ -544,17 +548,68 @@ void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef* hfdcan)
 */
 void HAL_FMAC_MspInit(FMAC_HandleTypeDef* hfmac)
 {
-  if(hfmac->Instance==FMAC)
-  {
-  /* USER CODE BEGIN FMAC_MspInit 0 */
-
-  /* USER CODE END FMAC_MspInit 0 */
-    /* Peripheral clock enable */
-    __HAL_RCC_FMAC_CLK_ENABLE();
-  /* USER CODE BEGIN FMAC_MspInit 1 */
-
-  /* USER CODE END FMAC_MspInit 1 */
-  }
+	  if(hfmac->Instance==FMAC)
+	  {
+		    __HAL_RCC_FMAC_CLK_ENABLE();
+
+		    /* FMAC DMA Init */
+		    /* FMAC_PRELOAD Init */
+		    hdma_fmac_preload.Instance = DMA2_Stream0;
+		    hdma_fmac_preload.Init.Request = DMA_REQUEST_MEM2MEM;
+		    hdma_fmac_preload.Init.Direction = DMA_MEMORY_TO_MEMORY;
+		    hdma_fmac_preload.Init.PeriphInc = DMA_PINC_ENABLE;
+		    hdma_fmac_preload.Init.MemInc = DMA_MINC_DISABLE;
+		    hdma_fmac_preload.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+		    hdma_fmac_preload.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+		    hdma_fmac_preload.Init.Mode = DMA_NORMAL;
+		    hdma_fmac_preload.Init.Priority = DMA_PRIORITY_HIGH;
+		    if (HAL_DMA_Init(&hdma_fmac_preload) != HAL_OK)
+		    {
+		      Error_Handler();
+		    }
+
+		    __HAL_LINKDMA(hfmac,hdmaPreload,hdma_fmac_preload);
+
+		    /* FMAC_WRITE Init */
+		    hdma_fmac_write.Instance = DMA2_Stream1;
+		    hdma_fmac_write.Init.Request = DMA_REQUEST_FMAC_WRITE;
+		    hdma_fmac_write.Init.Direction = DMA_MEMORY_TO_PERIPH;
+		    hdma_fmac_write.Init.PeriphInc = DMA_PINC_DISABLE;
+		    hdma_fmac_write.Init.MemInc = DMA_MINC_ENABLE;
+		    hdma_fmac_write.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+		    hdma_fmac_write.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+		    hdma_fmac_write.Init.Mode = DMA_NORMAL;
+		    hdma_fmac_write.Init.Priority = DMA_PRIORITY_HIGH;
+		    if (HAL_DMA_Init(&hdma_fmac_write) != HAL_OK)
+		    {
+		      Error_Handler();
+		    }
+
+		    __HAL_LINKDMA(hfmac,hdmaIn,hdma_fmac_write);
+
+		    /* FMAC interrupt Init */
+
+	    /* FMAC DMA Init */
+	    /* FMAC_READ Init */
+	    hdma_fmac_read.Instance = DMA2_Stream2;
+	    hdma_fmac_read.Init.Request = DMA_REQUEST_FMAC_READ;
+	    hdma_fmac_read.Init.Direction = DMA_PERIPH_TO_MEMORY;
+	    hdma_fmac_read.Init.PeriphInc = DMA_PINC_DISABLE;
+	    hdma_fmac_read.Init.MemInc = DMA_MINC_ENABLE;
+	    hdma_fmac_read.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
+	    hdma_fmac_read.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
+	    hdma_fmac_read.Init.Mode = DMA_NORMAL;
+	    hdma_fmac_read.Init.Priority = DMA_PRIORITY_HIGH;
+	    if (HAL_DMA_Init(&hdma_fmac_read) != HAL_OK)
+	    {
+	      Error_Handler();
+	    }
+
+	    __HAL_LINKDMA(hfmac,hdmaOut,hdma_fmac_read);
+
+	    HAL_NVIC_SetPriority(FMAC_IRQn, 0, 0);
+		    HAL_NVIC_EnableIRQ(FMAC_IRQn);
+	  }
 
 }
 

Core/Src/stm32h7xx_it.c

@@ -62,6 +62,10 @@ extern DMA_HandleTypeDef hdma_adc3;
 extern DMA_HandleTypeDef hdma_i2c2_rx;
 extern DMA_HandleTypeDef hdma_i2c2_tx;
 extern I2C_HandleTypeDef hi2c2;
+extern DMA_HandleTypeDef hdma_fmac_preload;
+extern DMA_HandleTypeDef hdma_fmac_read;
+extern DMA_HandleTypeDef hdma_fmac_write;
+extern FMAC_HandleTypeDef hfmac;
 extern LPTIM_HandleTypeDef hlptim1;
 extern LPTIM_HandleTypeDef hlptim2;
 extern LPTIM_HandleTypeDef hlptim3;
@@ -342,6 +346,30 @@ void DMA1_Stream6_IRQHandler(void)
   /* USER CODE END DMA1_Stream6_IRQn 1 */
 }
 
+  /** @brief DMA fmac configuration (hardcoded the handler, this normally is generated by the IDE)
+  */
+void DMA2_Stream0_IRQHandler(void)
+{
+  HAL_DMA_IRQHandler(&hdma_fmac_preload);
+}
+
+void DMA2_Stream1_IRQHandler(void)
+{
+  HAL_DMA_IRQHandler(&hdma_fmac_write);
+}
+
+void DMA2_Stream2_IRQHandler(void)
+{
+  HAL_DMA_IRQHandler(&hdma_fmac_read);
+}
+
+void FMAC_IRQHandler(void)
+{
+  HAL_FMAC_IRQHandler(&hfmac);
+}
+
+
+
 /**
   * @brief This function handles TIM2 global interrupt.
   */

tools/build.py

@@ -1,4 +1,3 @@
-#!/usr/bin/python3
 import os
 import argparse
 import subprocess