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Added Aarch64 support to oclmath library #921

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Added Aarch64 support to oclmath library #921

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3995f6f
Added support for Aarch64
lrpablo Jul 31, 2024
2a4ae27
Added support for Aarch64
lrpablo Aug 1, 2024
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14 changes: 13 additions & 1 deletion oclmath/fpcontrol.h
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Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,11 @@
__asm__ volatile ("fmrx %0, fpscr" : "=r"(fpscr));
*mode = fpscr;
__asm__ volatile ("fmxr fpscr, %0" :: "r"(fpscr | (1U << 24)));
#elif defined ( __aarch64__ )
unsigned fpcr;
__asm__ volatile ("mrs %0, fpcr" : "=r"(fpcr));
*mode = fpcr;
__asm__ volatile ("msr fpcr, %0" :: "r"(fpcr | (1U << 24)));
#else
#error ForceFTZ needs an implentation
#endif
Expand All @@ -50,6 +55,11 @@
__asm__ volatile ("fmrx %0, fpscr" : "=r"(fpscr));
*mode = fpscr;
__asm__ volatile ("fmxr fpscr, %0" :: "r"(fpscr & ~(1U << 24)));
#elif defined ( __aarch64__ )
unsigned fpcr;
__asm__ volatile ("mrs %0, fpcr" : "=r"(fpcr));
*mode = fpcr;
__asm__ volatile ("msr fpcr, %0" :: "r"(fpcr & ~(1U << 24)));
#else
#error DisableFTZ needs an implentation
#endif
Expand All @@ -64,6 +74,8 @@
fpu_control = *mode;
#elif defined (__arm__)
__asm__ volatile ("fmxr fpscr, %0" :: "r"(*mode));
#elif defined( __aarch64__ )
__asm__ volatile ("msr fpcr, %0" :: "r"(*mode));
#else
#error RestoreFPState needs an implementation
#endif
Expand All @@ -72,4 +84,4 @@
#error ForceFTZ and RestoreFPState need implentations
#endif

#endif
#endif
2 changes: 1 addition & 1 deletion oclmath/reference_math.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4800,7 +4800,7 @@ static long double reference_scalblnl(long double x, long n)

return x;

#elif defined(__arm__) // ARM .. sizeof(long double) == sizeof(double)
#elif defined(__arm__) || defined( __aarch64__ ) // ARM .. sizeof(long double) == sizeof(double)

#if __DBL_MAX_EXP__ >= __LDBL_MAX_EXP__
if(reference_isinfl(x) || reference_isnanl(x))
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24 changes: 15 additions & 9 deletions oclmath/rounding_mode.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -186,11 +186,14 @@ void *FlushToZero( void )
union{ unsigned int i; void *p; }u = { _mm_getcsr() };
_mm_setcsr( u.i | 0x8040 );
return u.p;
#elif defined( __arm__ )
#elif defined( __arm__ ) || defined( __aarch64__ )
#define _ARM_FE_FTZ 0x1000000
#define _ARM_FE_NFTZ 0x0
#define _FPU_SETCW(cw) __asm__ ("VMSR FPSCR,%0" : :"ri" (cw))

#define _ARM_FE_NFTZ 0x0
#if defined( __arm__ )
#define _FPU_SETCW(cw) __asm__ ("VMSR FPSCR,%0" : :"ri" (cw))
#elif defined(__aarch64__)
#define _FPU_SETCW(cw) __asm__ ("MSR FPCR,%0" : :"ri" (cw))
#endif
static const int ftz_modes[ kRoundingModeCount ] = { _ARM_FE_FTZ, _ARM_FE_NFTZ };
const int *f = ftz_modes;
_FPU_SETCW( f[0] );
Expand All @@ -199,7 +202,7 @@ void *FlushToZero( void )
fpu_control_t flags = 0;
_FPU_GETCW(flags);
flags |= _FPU_MASK_NI;
_FPU_SETCW(flags);
_FPU_SETCW(flags);
return NULL;
#else
#error Unknown arch
Expand All @@ -216,11 +219,14 @@ void UnFlushToZero( void *p)
#if defined( __i386__ ) || defined( __x86_64__ ) || defined(_MSC_VER)
union{ void *p; int i; }u = { p };
_mm_setcsr( u.i );
#elif defined( __arm__ )
#elif defined( __arm__ ) || defined( __aarch64__ )
#define _ARM_FE_FTZ 0x1000000
#define _ARM_FE_NFTZ 0x0
#define _FPU_SETCW(cw) __asm__ ("VMSR FPSCR,%0" : :"ri" (cw))

#define _ARM_FE_NFTZ 0x0
#if defined( __arm__ )
#define _FPU_SETCW(cw) __asm__ ("VMSR FPSCR,%0" : :"ri" (cw))
#elif defined( __aarch64__ )
#define _FPU_SETCW(cw) __asm__ ("MSR FPCR,%0" : :"ri" (cw))
#endif
static const int ftz_modes[ kRoundingModeCount ] = { _ARM_FE_FTZ, _ARM_FE_NFTZ };
const int *f = ftz_modes;
_FPU_SETCW( f[1] );
Expand Down