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Merge pull request #317 from Severson-Group/user/annikaolson/encoder-…
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Synchronize Encoder Updates with PWM Carrier
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npetersen2 authored Sep 27, 2023
2 parents c2d7670 + c339e76 commit 478293f
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843 changes: 612 additions & 231 deletions hw/amdc_revd.bd

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832 changes: 417 additions & 415 deletions hw/amdc_reve.bd

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91 changes: 77 additions & 14 deletions ip_repo/amdc_encoder_1.0/component.xml
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Expand Up @@ -199,7 +199,7 @@
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Expand All @@ -326,7 +326,7 @@
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Expand Down Expand Up @@ -465,6 +465,32 @@
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6 changes: 5 additions & 1 deletion ip_repo/amdc_encoder_1.0/hdl/amdc_encoder_v1_0.v
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,8 @@
input wire alarm_B,
input wire alarm_Z,
input wire alarm_D,
input wire pwm_carrier_low,
input wire pwm_carrier_high,
// User ports ends
// Do not modify the ports beyond this line

Expand Down Expand Up @@ -77,7 +79,9 @@
.S_AXI_RREADY(s00_axi_rready),
.A(A),
.B(B),
.Z(Z)
.Z(Z),
.pwm_carrier_high(pwm_carrier_high),
.pwm_carrier_low(pwm_carrier_low)
);

// Add user logic here
Expand Down
14 changes: 11 additions & 3 deletions ip_repo/amdc_encoder_1.0/hdl/amdc_encoder_v1_0_S00_AXI.v
Original file line number Diff line number Diff line change
Expand Up @@ -18,6 +18,8 @@
input wire A,
input wire B,
input wire Z,
input wire pwm_carrier_high,
input wire pwm_carrier_low,
// User ports ends
// Do not modify the ports beyond this line

Expand Down Expand Up @@ -85,6 +87,8 @@

wire [31:0] counter;
wire [31:0] position;
wire [31:0] steps_synced;
wire [31:0] position_synced;

// AXI4LITE signals
reg [C_S_AXI_ADDR_WIDTH-1 : 0] axi_awaddr;
Expand Down Expand Up @@ -377,8 +381,8 @@
case ( axi_araddr[ADDR_LSB+OPT_MEM_ADDR_BITS:ADDR_LSB] )
2'h0 : reg_data_out <= counter;
2'h1 : reg_data_out <= position;
2'h2 : reg_data_out <= slv_reg2;
2'h3 : reg_data_out <= slv_reg3;
2'h2 : reg_data_out <= steps_synced;
2'h3 : reg_data_out <= position_synced;
default : reg_data_out <= 0;
endcase
end
Expand Down Expand Up @@ -411,7 +415,11 @@
.Z(Z),
.counter(counter),
.position(position),
.pulses_per_rev_bits(slv_reg2)
.pulses_per_rev(slv_reg2),
.pwm_carrier_high(pwm_carrier_high),
.pwm_carrier_low(pwm_carrier_low),
.position_synced(position_synced),
.steps_synced(steps_synced)
);


Expand Down
36 changes: 31 additions & 5 deletions ip_repo/amdc_encoder_1.0/src/encoder.v
Original file line number Diff line number Diff line change
Expand Up @@ -9,18 +9,21 @@
// and sum them into a binary counter register.
//
// Z is used to provide single revolution position via `position` output
// `position` ranges between 0 and (2 ^ pulses_per_rev_bits) - 1
// `position` ranges between 0 and pulses_per_rev_bits - 1
//
module encoder(clk, rst_n, A, B, Z, counter, position, pulses_per_rev_bits);
module encoder(clk, rst_n, A, B, Z, pwm_carrier_low, pwm_carrier_high, counter, position, pulses_per_rev, steps_synced, position_synced);

input A, B, Z;
input pwm_carrier_high, pwm_carrier_low;
input clk;
input rst_n;

input [31:0] pulses_per_rev_bits;
input [31:0] pulses_per_rev;

output wire [31:0] counter;
output wire [31:0] position;
output reg [31:0] steps_synced;
output reg [31:0] position_synced;

// State machine signals that indicate
// when steps increment or decrement
Expand Down Expand Up @@ -180,13 +183,13 @@ end
//
// Typically ~12-bit (2^12 = 4096 pulses per rev).
//
// Stored in `pulses_per_rev_bits` input signal.
// Stored in `pulses_per_rev` input signal.
//
// Max pulses per rev: 2^32
// *****************************

wire [31:0] MAX_POS;
assign MAX_POS = (32'd1 << pulses_per_rev_bits) - 32'd1;
assign MAX_POS = pulses_per_rev - 32'd1;

// Find rising edge of Z
wire z_rise;
Expand Down Expand Up @@ -232,4 +235,27 @@ end

assign position = know_pos ? my_pos : 32'hFFFFFFFF;

// **************************************************
// Synchronizes the register updates to the control
// code by making the register updates (steps and
// position) relative to the ADMC-Firmware timing
// **************************************************

always @(posedge clk, negedge rst_n) begin
if (!rst_n) begin
steps_synced <= 32'b0;
position_synced <= 32'hFFFFFFFF;
end

else if (pwm_carrier_low || pwm_carrier_high) begin
steps_synced <= counter;
position_synced <= position;
end

else begin
steps_synced <= steps_synced;
position_synced <= position_synced;
end
end

endmodule
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