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Added BUFG
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Lane Brooks committed Feb 11, 2010
1 parent 11d2808 commit 6099f59
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4 changes: 4 additions & 0 deletions BUFG.v
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module BUFG (output O, input I);
assign O=I;
endmodule

2 changes: 2 additions & 0 deletions README
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This is mainly a simulation library of xilinx primitives that are
verilator compatible.

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