v1.1.1 released: DDR for Xilinx Platform

I've gotten around to testing a few things now that I have a Xilinx FPGA board and installed Vivado.

With this release:

• DDR should work now on Xilinx series 7 FPGAs 🙂
• If you are using HDLMake, I renamed the local OBUFDS to OBUFDS_quartus so it doesn't conflict with Xilinx's built-in SelectIO obufds