fpga-ml-accelerator

This repository hosts the code for an FPGA based accelerator for convolutional neural networks a very detailed account of the entire design and design principles is present at https://thedatabus.io/introduction . This repository was previously present at https://github.com/sumanth-kalluri/cnn_hardware_acclerator_for_fpga

Name		Name	Last commit message	Last commit date
Latest commit History 5 Commits
README.md		README.md
accelerator.v		accelerator.v
accelerator_tb.v		accelerator_tb.v
comparator2.v		comparator2.v
control_logic2.v		control_logic2.v
convolver.v		convolver.v
convolver_tb.v		convolver_tb.v
input_mux.v		input_mux.v
mac_manual.v		mac_manual.v
max_reg.v		max_reg.v
pooler.v		pooler.v
qadd.v		qadd.v
qmult.v		qmult.v
relu.v		relu.v
tanh_data.mem		tanh_data.mem
tanh_lut.v		tanh_lut.v
variable_shift_reg.v		variable_shift_reg.v

Provide feedback