[rom_ctrl, dv] Conditional coverage hole in tlul_adapter_sram fifos #4192
ci.yml
on: pull_request
Lint (quick)
3m 9s
Earl Grey for CW310 Hyperdebug
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Build bitstream
1m 58s
Lint (slow)
11m 26s
Build documentation
5m 2s
Airgapped build
8m 0s
Verible lint
1m 1s
Run OTBN smoke Test
2m 44s
Run OTBN crypto tests
22m 42s
Verilated English Breakfast
8m 30s
Verilated Earl Grey
1h 23m
CW305's Bitstream
22m 58s
Build Docker Containers
2m 23s
Build and test software
13m 7s
CW310 ROM_EXT Tests
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FPGA test
7m 21s
CW310 SiVal Tests
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FPGA test
25m 12s
CW310 SiVal ROM_EXT Tests
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FPGA test
43m 23s
CW310 Manufacturing Tests
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FPGA test
32m 51s
CW340 Test ROM Tests
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FPGA test
3m 48s
CW340 ROM Tests
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FPGA test
44s
CW340 ROM_EXT Tests
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FPGA test
6m 14s
CW340 SiVal Tests
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FPGA test
17m 54s
CW340 SiVal ROM_EXT Tests
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FPGA test
4m 39s
CW340 Manufacturing Tests
/
FPGA test
44m 43s
CW310 Test ROM Tests
/
FPGA test
3m 55s
CW310 ROM Tests
/
FPGA test
43m 31s
Cache bitstreams to GCP
0s
Verify FPGA jobs
26s
Annotations
10 errors
Lint (slow)
Countermeasure check failed.
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Lint (slow)
Process completed with exit code 1.
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Lint (slow)
Some target names have banned characters.
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Lint (slow)
Process completed with exit code 1.
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Lint (slow)
Process completed with exit code 1.
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Lint (slow)
Countermeasure check failed.
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Lint (slow)
Process completed with exit code 1.
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Build and test software
Process completed with exit code 1.
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CW310 ROM Tests / FPGA test
Process completed with exit code 3.
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Artifacts
Produced during runtime
Name | Size | |
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chip_englishbreakfast_cw305
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1.4 MB |
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execute_manuf_fpga_tests_cw310-targets
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623 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
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59.4 KB |
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execute_manuf_fpga_tests_cw340-targets
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594 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
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56.7 KB |
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execute_rom_ext_fpga_tests_cw310-targets
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519 Bytes |
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execute_rom_ext_fpga_tests_cw310-test-results
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13.1 KB |
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execute_rom_ext_fpga_tests_cw340-targets
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437 Bytes |
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execute_rom_ext_fpga_tests_cw340-test-results
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7.31 KB |
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execute_rom_fpga_tests_cw310-targets
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1.76 KB |
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execute_rom_fpga_tests_cw310-test-results
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47.6 KB |
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execute_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_fpga_tests_cw340-test-results
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201 Bytes |
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execute_sival_fpga_tests_cw310-targets
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784 Bytes |
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execute_sival_fpga_tests_cw310-test-results
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37.3 KB |
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execute_sival_fpga_tests_cw340-targets
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502 Bytes |
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execute_sival_fpga_tests_cw340-test-results
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40 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
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2.25 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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186 KB |
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execute_sival_rom_ext_fpga_tests_cw340-targets
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435 Bytes |
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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18.4 KB |
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execute_test_rom_fpga_tests_cw310-targets
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326 Bytes |
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execute_test_rom_fpga_tests_cw310-test-results
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3.24 KB |
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execute_test_rom_fpga_tests_cw340-targets
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258 Bytes |
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execute_test_rom_fpga_tests_cw340-test-results
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45.3 KB |
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partial-build-bin-chip_earlgrey_cw310
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6.04 MB |
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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6.02 MB |
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partial-build-bin-chip_earlgrey_cw340
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9.9 MB |
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sw_build_test-test-results
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75.2 KB |
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verilated_englishbreakfast
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6.99 MB |
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verilator_earlgrey-test-results
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8.88 KB |
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