[ipgen,topgen] Uniquify VLNVs and reorganize core hierarchies #4206
Triggered via pull request
January 9, 2025 15:44
a-will
Status
Success
Total duration
3h 21m 22s
Artifacts
31
ci.yml
on: pull_request
Lint (quick)
3m 6s
Earl Grey for CW310 Hyperdebug
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Build bitstream
1h 8m
Lint (slow)
12m 9s
Build documentation
5m 21s
Airgapped build
8m 6s
Verible lint
1m 5s
Run OTBN smoke Test
2m 56s
Run OTBN crypto tests
23m 8s
Verilated English Breakfast
9m 29s
Verilated Earl Grey
1h 28m
CW305's Bitstream
22m 25s
Build Docker Containers
2m 34s
Build and test software
22m 17s
CW310 ROM_EXT Tests
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FPGA test
8m 5s
CW310 SiVal Tests
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FPGA test
25m 9s
CW310 SiVal ROM_EXT Tests
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FPGA test
43m 42s
CW310 Manufacturing Tests
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FPGA test
33m 43s
CW340 Test ROM Tests
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FPGA test
4m 9s
CW340 ROM Tests
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FPGA test
49s
CW340 ROM_EXT Tests
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FPGA test
7m 16s
CW340 SiVal Tests
/
FPGA test
17m 24s
CW340 SiVal ROM_EXT Tests
/
FPGA test
3m 53s
CW340 Manufacturing Tests
/
FPGA test
46m 3s
CW310 Test ROM Tests
/
FPGA test
3m 55s
CW310 ROM Tests
/
FPGA test
44m 46s
Cache bitstreams to GCP
0s
Verify FPGA jobs
24s
Annotations
8 errors
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Countermeasure check failed.
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Process completed with exit code 1.
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Some target names have banned characters.
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Process completed with exit code 1.
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Process completed with exit code 1.
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Countermeasure check failed.
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Lint (slow)
Process completed with exit code 1.
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Build and test software
Process completed with exit code 1.
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Artifacts
Produced during runtime
| Name | Size | |
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chip_englishbreakfast_cw305
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1.39 MB |
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execute_manuf_fpga_tests_cw310-targets
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623 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
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59.1 KB |
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execute_manuf_fpga_tests_cw340-targets
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594 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
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56.1 KB |
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execute_rom_ext_fpga_tests_cw310-targets
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519 Bytes |
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execute_rom_ext_fpga_tests_cw310-test-results
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12.9 KB |
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execute_rom_ext_fpga_tests_cw340-targets
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437 Bytes |
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execute_rom_ext_fpga_tests_cw340-test-results
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7.37 KB |
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execute_rom_fpga_tests_cw310-targets
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1.76 KB |
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execute_rom_fpga_tests_cw310-test-results
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47.3 KB |
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execute_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_fpga_tests_cw340-test-results
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201 Bytes |
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execute_sival_fpga_tests_cw310-targets
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784 Bytes |
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execute_sival_fpga_tests_cw310-test-results
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36.3 KB |
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execute_sival_fpga_tests_cw340-targets
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502 Bytes |
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execute_sival_fpga_tests_cw340-test-results
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39.9 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
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2.25 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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186 KB |
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execute_sival_rom_ext_fpga_tests_cw340-targets
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435 Bytes |
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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17.5 KB |
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execute_test_rom_fpga_tests_cw310-targets
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326 Bytes |
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execute_test_rom_fpga_tests_cw310-test-results
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3.25 KB |
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execute_test_rom_fpga_tests_cw340-targets
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258 Bytes |
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execute_test_rom_fpga_tests_cw340-test-results
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45.4 KB |
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partial-build-bin-chip_earlgrey_cw310
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6.04 MB |
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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6.02 MB |
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partial-build-bin-chip_earlgrey_cw340
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9.9 MB |
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sw_build_test-test-results
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76.2 KB |
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verilated_englishbreakfast
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6.99 MB |
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verilator_earlgrey-test-results
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8.83 KB |
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