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[bazel] Define rules-based CC lowRISC toolchain #4260

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[bazel] Define rules-based CC lowRISC toolchain

[bazel] Define rules-based CC lowRISC toolchain #4260

Triggered via pull request January 10, 2025 14:05
@jwnrtjwnrt
synchronize #25810
jwnrt:rules-cc-lowrisc-toolchain
Status Cancelled
Total duration 18m 43s
Artifacts 2

ci.yml

on: pull_request
Lint (quick)
3m 38s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
0s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
0s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
0s
Earl Grey for CW310 / Build bitstream
Lint (slow)
11m 45s
Lint (slow)
Build documentation
4m 54s
Build documentation
Airgapped build
6m 26s
Airgapped build
Verible lint
1m 4s
Verible lint
Run OTBN smoke Test
2m 44s
Run OTBN smoke Test
Run OTBN crypto tests
14m 24s
Run OTBN crypto tests
Verilated English Breakfast
8m 35s
Verilated English Breakfast
Verilated Earl Grey
14m 24s
Verilated Earl Grey
CW305's Bitstream
14m 9s
CW305's Bitstream
Build Docker Containers
2m 41s
Build Docker Containers
Build and test software
2m 38s
Build and test software
CW310 Manufacturing Tests  /  FPGA test
CW310 Manufacturing Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
CW310 SiVal Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
CW310 ROM Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
CW310 Test ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
0s
Verify FPGA jobs
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Annotations

18 errors
Build and test software
Process completed with exit code 1.
Airgapped build
Process completed with exit code 2.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Earl Grey for CW310 / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25810/merge' exists
Earl Grey for CW340 / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25810/merge' exists
Earl Grey for CW310 Hyperdebug / Build bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25810/merge' exists
Verilated Earl Grey
Canceling since a higher priority waiting request for 'CI-refs/pull/25810/merge' exists
Verilated Earl Grey
The operation was canceled.
Run OTBN crypto tests
Canceling since a higher priority waiting request for 'CI-refs/pull/25810/merge' exists
Run OTBN crypto tests
The operation was canceled.
CW305's Bitstream
Canceling since a higher priority waiting request for 'CI-refs/pull/25810/merge' exists
CW305's Bitstream
The operation was canceled.

Artifacts

Produced during runtime
Name Size
sw_build_test-test-results
201 Bytes
verilated_englishbreakfast
6.99 MB