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[englishbreakfast] Redo topgen to fix merge skew #4287

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[englishbreakfast] Redo topgen to fix merge skew

[englishbreakfast] Redo topgen to fix merge skew #4287

Triggered via pull request January 10, 2025 23:56
@a-willa-will
opened #25848
a-will:eb-regen
Status Failure
Total duration 1h 21m 0s
Artifacts 4

ci.yml

on: pull_request
Lint (quick)
3m 14s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
1h 3m
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW340  /  Build bitstream
48m 25s
Earl Grey for CW340 / Build bitstream
Earl Grey for CW310  /  Build bitstream
1h 5m
Earl Grey for CW310 / Build bitstream
Lint (slow)
12m 22s
Lint (slow)
Build documentation
4m 52s
Build documentation
Airgapped build
8m 34s
Airgapped build
Verible lint
1m 7s
Verible lint
Run OTBN smoke Test
2m 32s
Run OTBN smoke Test
Run OTBN crypto tests
23m 52s
Run OTBN crypto tests
Verilated English Breakfast
9m 28s
Verilated English Breakfast
Verilated Earl Grey
1h 17m
Verilated Earl Grey
CW305's Bitstream
22m 58s
CW305's Bitstream
Build Docker Containers
2m 58s
Build Docker Containers
Build and test software
19m 9s
Build and test software
CW310 Manufacturing Tests  /  FPGA test
CW310 Manufacturing Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
CW310 ROM_EXT Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 SiVal Tests  /  FPGA test
CW310 SiVal Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
CW340 Manufacturing Tests / FPGA test
CW340 ROM Tests  /  FPGA test
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
CW340 SiVal Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
CW340 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
CW310 ROM Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
CW310 Test ROM Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
19s
Verify FPGA jobs
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Annotations

13 errors
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Some target names have banned characters.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Process completed with exit code 1.
Lint (slow)
Countermeasure check failed.
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 1.
Earl Grey for CW340 / Build bitstream
The self-hosted runner: ubuntu-22.04-bitstream-xwwmk-runner-t8lsh lost communication with the server. Verify the machine is running and has a healthy network connection. Anything in your workflow that terminates the runner process, starves it for CPU/Memory, or blocks its network access can cause this error.
Earl Grey for CW310 Hyperdebug / Build bitstream
The self-hosted runner: ubuntu-22.04-bitstream-xwwmk-runner-httdz lost communication with the server. Verify the machine is running and has a healthy network connection. Anything in your workflow that terminates the runner process, starves it for CPU/Memory, or blocks its network access can cause this error.
Earl Grey for CW310 / Build bitstream
The self-hosted runner: ubuntu-22.04-bitstream-xwwmk-runner-62fz7 lost communication with the server. Verify the machine is running and has a healthy network connection. Anything in your workflow that terminates the runner process, starves it for CPU/Memory, or blocks its network access can cause this error.
Verify FPGA jobs
Process completed with exit code 1.
Verify FPGA jobs
Process completed with exit code 1.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.39 MB
sw_build_test-test-results
72.3 KB
verilated_englishbreakfast
6.98 MB
verilator_earlgrey-test-results
8.97 KB