Skip to content

Commit

Permalink
[topgen] Add support for instantiating uniquified ipgen IPs
Browse files Browse the repository at this point in the history
Signed-off-by: Robert Schilling <[email protected]>
  • Loading branch information
Razer6 authored and vogelpi committed Jan 23, 2025
1 parent 56e6a5a commit 27932fe
Show file tree
Hide file tree
Showing 20 changed files with 142 additions and 36 deletions.
6 changes: 6 additions & 0 deletions hw/ip_templates/clkmgr/data/clkmgr.tpldesc.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -104,5 +104,11 @@
type: "string"
default: "lowrisc:constants:top_pkg"
}
{
name: "module_instance_name"
desc: "instance name in case there are multiple clkmgr instances. Not yet implemented."
type: "string"
default: "clkmgr"
}
]
}
6 changes: 6 additions & 0 deletions hw/ip_templates/flash_ctrl/data/flash_ctrl.tpldesc.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -99,5 +99,11 @@
type: "string"
default: "lowrisc:constants:top_pkg"
}
{
name: "module_instance_name"
desc: "instance name in case there are multiple flash_ctrl instances. Not yet implemented."
type: "string"
default: "flash_ctrl"
}
]
}
6 changes: 6 additions & 0 deletions hw/ip_templates/otp_ctrl/data/otp_ctrl.tpldesc.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -15,5 +15,11 @@
type: "object"
default: {}
}
{
name: "module_instance_name"
desc: "instance name in case there are multiple otp_ctrl instances. Not yet implemented."
type: "string"
default: "otp_ctrl"
}
]
}
6 changes: 6 additions & 0 deletions hw/ip_templates/pinmux/data/pinmux.tpldesc.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -81,5 +81,11 @@
type: "string"
default: "lowrisc:systems:scan_role_pkg"
}
{
name: "module_instance_name"
desc: "instance name in case there are multiple pinmux instances. Not yet implemented."
type: "string"
default: "pinmux"
}
]
}
6 changes: 6 additions & 0 deletions hw/ip_templates/pwrmgr/data/pwrmgr.tpldesc.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -70,5 +70,11 @@
type: "string"
default: "lowrisc:constants:top_pkg"
}
{
name: "module_instance_name"
desc: "instance name in case there are multiple pwrmgr instances. Not yet implemented."
type: "string"
default: "pwrmgr"
}
]
}
6 changes: 6 additions & 0 deletions hw/ip_templates/rstmgr/data/rstmgr.tpldesc.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -135,5 +135,11 @@
type: "string"
default: "lowrisc:constants:top_pkg"
}
{
name: "module_instance_name"
desc: "instance name in case there are multiple pwrmgr instances. Not yet implemented."
type: "string"
default: "pwrmgr"
}
]
}
7 changes: 7 additions & 0 deletions hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -1020,6 +1020,7 @@
{
name: otp_ctrl
type: otp_ctrl
template_type: otp_ctrl
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -2127,6 +2128,7 @@
{
name: alert_handler
type: alert_handler
template_type: alert_handler
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -2357,6 +2359,7 @@
{
name: pwrmgr_aon
type: pwrmgr
template_type: pwrmgr
clock_group: powerup
clock_srcs:
{
Expand Down Expand Up @@ -2721,6 +2724,7 @@
{
name: rstmgr_aon
type: rstmgr
template_type: rstmgr
clock_srcs:
{
clk_i:
Expand Down Expand Up @@ -2925,6 +2929,7 @@
{
name: clkmgr_aon
type: clkmgr
template_type: clkmgr
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -3260,6 +3265,7 @@
{
name: pinmux_aon
type: pinmux
template_type: pinmux
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -4553,6 +4559,7 @@
{
name: rv_plic
type: rv_plic
template_type: rv_plic
clock_srcs:
{
clk_i: main
Expand Down
7 changes: 7 additions & 0 deletions hw/top_darjeeling/data/top_darjeeling.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -313,6 +313,7 @@
},
{ name: "otp_ctrl",
type: "otp_ctrl",
template_type: "otp_ctrl",
clock_srcs: {clk_i: "io_div4", clk_edn_i: "main"},
clock_group: "secure",
reset_connections: {rst_ni: "lc_io_div4", rst_edn_ni: "lc"},
Expand Down Expand Up @@ -349,6 +350,7 @@
},
{ name: "alert_handler",
type: "alert_handler",
template_type: "alert_handler",
clock_srcs: {clk_i: "io_div4", clk_edn_i: "main"},
clock_group: "secure",
reset_connections: {rst_ni: "lc_io_div4", rst_edn_ni: "lc"},
Expand All @@ -368,6 +370,7 @@
},
{ name: "pwrmgr_aon",
type: "pwrmgr",
template_type: "pwrmgr",
// TODO: RS, fix after pwrmgr fix is merged
// param_decl: {
// PwrFsmWaitForExtRst: "1"
Expand Down Expand Up @@ -413,6 +416,7 @@
},
{ name: "rstmgr_aon",
type: "rstmgr",
template_type: "rstmgr",
clock_srcs: {
clk_i: {
clock: "io_div4",
Expand Down Expand Up @@ -440,6 +444,7 @@
},
{ name: "clkmgr_aon",
type: "clkmgr",
template_type: "clkmgr",
clock_srcs: {
clk_i: "io_div4",
clk_main_i: {
Expand Down Expand Up @@ -482,6 +487,7 @@
},
{ name: "pinmux_aon",
type: "pinmux",
template_type: "pinmux",
clock_srcs: {clk_i: "io_div4", clk_aon_i: "aon"},
clock_group: "powerup",
reset_connections: {rst_ni: "lc_io_div4",
Expand Down Expand Up @@ -646,6 +652,7 @@
},
{ name: "rv_plic",
type: "rv_plic",
template_type: "rv_plic",
clock_srcs: {clk_i: "main"},
clock_group: "secure",
reset_connections: {rst_ni: "lc"},
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
src: 158
target: 1
prio: 3
module_instance_name: rv_plic
topname: darjeeling
}
}
8 changes: 4 additions & 4 deletions hw/top_darjeeling/templates/toplevel.sv.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -329,7 +329,7 @@ module top_${top["name"]} #(
## Inter-module signal collection

% for m in top["module"]:
% if m["type"] == "otp_ctrl":
% if m.get("template_type") == "otp_ctrl":
// OTP HW_CFG Broadcast signals.
// TODO(#6713): The actual struct breakout and mapping currently needs to
// be performed by hand.
Expand Down Expand Up @@ -562,10 +562,10 @@ slice = f"{lo+w-1}:{lo}"
% endif
% endfor
% endif
% if m["type"] == "rv_plic":
% if m.get("template_type") == "rv_plic":
.intr_src_i (intr_vector),
% endif
% if m["type"] == "pinmux":
% if m.get("template_type") == "pinmux":

.periph_to_mio_i (mio_d2p ),
.periph_to_mio_oe_i (mio_en_d2p ),
Expand All @@ -586,7 +586,7 @@ slice = f"{lo+w-1}:{lo}"
.dio_in_i,

% endif
% if m["type"] == "alert_handler":
% if m.get("template_type") == "alert_handler":
// alert signals
.alert_rx_o ( alert_rx ),
.alert_tx_i ( alert_tx ),
Expand Down
8 changes: 8 additions & 0 deletions hw/top_earlgrey/data/autogen/top_earlgrey.gen.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -1505,6 +1505,7 @@
{
name: otp_ctrl
type: otp_ctrl
template_type: otp_ctrl
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -2613,6 +2614,7 @@
{
name: alert_handler
type: alert_handler
template_type: alert_handler
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -3252,6 +3254,7 @@
{
name: pwrmgr_aon
type: pwrmgr
template_type: pwrmgr
clock_group: powerup
clock_srcs:
{
Expand Down Expand Up @@ -3602,6 +3605,7 @@
{
name: rstmgr_aon
type: rstmgr
template_type: rstmgr
clock_srcs:
{
clk_i:
Expand Down Expand Up @@ -3806,6 +3810,7 @@
{
name: clkmgr_aon
type: clkmgr
template_type: clkmgr
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -4365,6 +4370,7 @@
{
name: pinmux_aon
type: pinmux
template_type: pinmux
clock_srcs:
{
clk_i: io_div4
Expand Down Expand Up @@ -5458,6 +5464,7 @@
{
name: flash_ctrl
type: flash_ctrl
template_type: flash_ctrl
clock_srcs:
{
clk_i: main
Expand Down Expand Up @@ -6269,6 +6276,7 @@
{
name: rv_plic
type: rv_plic
template_type: rv_plic
clock_srcs:
{
clk_i: main
Expand Down
8 changes: 8 additions & 0 deletions hw/top_earlgrey/data/top_earlgrey.hjson
Original file line number Diff line number Diff line change
Expand Up @@ -394,6 +394,7 @@
},
{ name: "otp_ctrl",
type: "otp_ctrl",
template_type: "otp_ctrl",
clock_srcs: {clk_i: "io_div4", clk_edn_i: "main"},
clock_group: "secure",
reset_connections: {rst_ni: "lc_io_div4", rst_edn_ni: "lc"},
Expand Down Expand Up @@ -427,6 +428,7 @@
},
{ name: "alert_handler",
type: "alert_handler",
template_type: "alert_handler",
clock_srcs: {clk_i: "io_div4", clk_edn_i: "main"},
clock_group: "secure",
reset_connections: {rst_ni: "lc_io_div4", rst_edn_ni: "lc"},
Expand Down Expand Up @@ -467,6 +469,7 @@
},
{ name: "pwrmgr_aon",
type: "pwrmgr",
template_type: "pwrmgr",
clock_group: "powerup",
clock_srcs: {
clk_i: "io_div4",
Expand Down Expand Up @@ -507,6 +510,7 @@
},
{ name: "rstmgr_aon",
type: "rstmgr",
template_type: "rstmgr",
clock_srcs: {
clk_i: {
clock: "io_div4",
Expand Down Expand Up @@ -534,6 +538,7 @@
},
{ name: "clkmgr_aon",
type: "clkmgr",
template_type: "clkmgr",
clock_srcs: {
clk_i: "io_div4",
clk_main_i: {
Expand Down Expand Up @@ -606,6 +611,7 @@
},
{ name: "pinmux_aon",
type: "pinmux",
template_type: "pinmux",
clock_srcs: {clk_i: "io_div4", clk_aon_i: "aon"},
clock_group: "powerup",
reset_connections: {rst_ni: "lc_io_div4",
Expand Down Expand Up @@ -735,6 +741,7 @@
},
{ name: "flash_ctrl",
type: "flash_ctrl",
template_type: "flash_ctrl",
clock_srcs: {clk_i: "main", clk_otp_i: "io_div4"},
clock_group: "infra",
reset_connections: {rst_ni: "lc", rst_otp_ni: "lc_io_div4"},
Expand Down Expand Up @@ -781,6 +788,7 @@
},
{ name: "rv_plic",
type: "rv_plic",
template_type: "rv_plic",
clock_srcs: {clk_i: "main"},
clock_group: "secure",
reset_connections: {rst_ni: "lc"},
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@
src: 186
target: 1
prio: 3
module_instance_name: rv_plic
topname: earlgrey
}
}
8 changes: 4 additions & 4 deletions hw/top_earlgrey/templates/toplevel.sv.tpl
Original file line number Diff line number Diff line change
Expand Up @@ -328,7 +328,7 @@ module top_${top["name"]} #(
## Inter-module signal collection

% for m in top["module"]:
% if m["type"] == "otp_ctrl":
% if m.get("template_type") == "otp_ctrl":
// OTP HW_CFG* Broadcast signals.
// TODO(#6713): The actual struct breakout and mapping currently needs to
// be performed by hand.
Expand Down Expand Up @@ -581,10 +581,10 @@ slice = f"{lo+w-1}:{lo}"
% endif
% endfor
% endif
% if m["type"] == "rv_plic":
% if m.get("template_type") == "rv_plic":
.intr_src_i (intr_vector),
% endif
% if m["type"] == "pinmux":
% if m.get("template_type") == "pinmux":

.periph_to_mio_i (mio_d2p ),
.periph_to_mio_oe_i (mio_en_d2p ),
Expand All @@ -605,7 +605,7 @@ slice = f"{lo+w-1}:{lo}"
.dio_in_i,

% endif
% if m["type"] == "alert_handler":
% if m.get("template_type") == "alert_handler":
// alert signals
.alert_rx_o ( alert_rx ),
.alert_tx_i ( alert_tx ),
Expand Down
Loading

0 comments on commit 27932fe

Please sign in to comment.