[ipgen,topgen] Uniquify VLNVs and reorganize core hierarchies

hw/top_darjeeling/ip_autogen/clkmgr/dv/sva/clkmgr_pwrmgr_sva_if.core → hw/dv/sv/mgr_lib/clkmgr_pwrmgr_sva_if.core

@@ -4,6 +4,7 @@ CAPI=2:
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:clkmgr_pwrmgr_sva_if:0.1"
 description: "CLKMGR to PWRMGR assertion interface."
+
 filesets:
   files_dv:
     depend:

hw/top_earlgrey/ip_autogen/pwrmgr/dv/sva/pwrmgr_rstmgr_sva_if.core → hw/dv/sv/mgr_lib/pwrmgr_rstmgr_sva_if.core

@@ -4,10 +4,10 @@ CAPI=2:
 # SPDX-License-Identifier: Apache-2.0
 name: "lowrisc:dv:pwrmgr_rstmgr_sva_if:0.1"
 description: "PWRMGR to RSTMGR assertion interface."
+
 filesets:
   files_dv:
     depend:
-      - lowrisc:ip_interfaces:pwrmgr_pkg
       - lowrisc:prim:assert
     files:
       - pwrmgr_rstmgr_sva_if.sv

hw/top_earlgrey/ip_autogen/pwrmgr/dv/sva/pwrmgr_rstmgr_sva_if.sv → hw/dv/sv/mgr_lib/pwrmgr_rstmgr_sva_if.sv

@@ -5,9 +5,9 @@
 // This has some assertions that check the inputs from rstmgr react according to
 // the pwrmgr outputs. The rstmgr inputs are generated by the base sequences, but
 // these assertions will also be useful at full chip level.
-interface pwrmgr_rstmgr_sva_if
-  import pwrmgr_pkg::*, pwrmgr_reg_pkg::*;
-(
+interface pwrmgr_rstmgr_sva_if #(
+  parameter int unsigned PowerDomains = 2
+) (
   input logic                    clk_i,
   input logic                    rst_ni,
   input logic                    clk_slow_i,

hw/ip/lc_ctrl/lc_ctrl.core

@@ -21,7 +21,7 @@ filesets:
       - lowrisc:ip:otp_ctrl_pkg
       - lowrisc:ip:kmac_pkg
       - lowrisc:ip:rv_dm
-      - lowrisc:ip_interfaces:alert_handler_reg
+      - lowrisc:ip_interfaces:alert_handler_pkg
     files:
       - rtl/lc_ctrl_regs_reg_top.sv
       - rtl/lc_ctrl_dmi_reg_top.sv

hw/ip/prim/prim_flop_2sync.core

@@ -10,6 +10,10 @@ filesets:
     depend:
       - lowrisc:prim:prim_pkg
       - lowrisc:prim:primgen
+      # TODO: This hack should go away with upstream fusesoc support. The
+      # generic prim_generic_flop_2sync depends on prim:flop, but the generator
+      # does not appear to run recursively.
+      - lowrisc:prim:flop
 
   files_verilator_waiver:
     depend:

hw/ip/prim/prim_mubi.core

@@ -16,8 +16,8 @@ filesets:
       - lowrisc:prim:assert
       - lowrisc:prim:buf
       - lowrisc:prim:flop
+      - lowrisc:prim:mubi_pkg
     files:
-      - rtl/prim_mubi_pkg.sv
       - rtl/prim_mubi4_sender.sv
       - rtl/prim_mubi4_sync.sv
       - rtl/prim_mubi4_dec.sv

hw/ip/prim/prim_mubi_pkg.core

@@ -0,0 +1,45 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+#
+# ------------------- W A R N I N G: A U T O - G E N E R A T E D   C O D E !! -------------------//
+# PLEASE DO NOT HAND-EDIT THIS FILE. IT HAS BEEN AUTO-GENERATED WITH THE FOLLOWING COMMAND:
+#
+#    util/design/gen-mubi.py
+#
+name: "lowrisc:prim:mubi_pkg:0.1"
+description: "Multibit types and functions"
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:prim:assert
+    files:
+      - rtl/prim_mubi_pkg.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+    files:
+      - lint/prim_mubi.waiver
+    file_type: waiver
+
+  files_veriblelint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+
+targets:
+  default: &default_target
+    filesets:
+      - tool_verilator   ? (files_verilator_waiver)
+      - tool_ascentlint  ? (files_ascentlint_waiver)
+      - tool_veriblelint ? (files_veriblelint_waiver)
+      - files_rtl

hw/ip/prim_generic/prim_generic_flash.core

@@ -13,7 +13,7 @@ filesets:
       - "fileset_partner  ? (partner:systems:ast_pkg)"
       - "!fileset_partner ? (lowrisc:systems:ast_pkg)"
       - lowrisc:ip_interfaces:flash_ctrl_pkg
-      - lowrisc:ip:flash_ctrl_prim_reg_top
+      - lowrisc:ip_interfaces:flash_ctrl_prim_reg_top
     files:
       - rtl/prim_generic_flash_bank.sv
       - rtl/prim_generic_flash.sv

hw/ip/tlul/headers.core

@@ -10,7 +10,7 @@ filesets:
     depend:
       - lowrisc:constants:top_pkg
       - lowrisc:prim:secded
-      - lowrisc:prim:mubi
+      - lowrisc:prim:mubi_pkg
     files:
       - rtl/tlul_pkg.sv
     file_type: systemVerilogSource

hw/ip_templates/alert_handler/alert_handler.core.tpl

@@ -4,14 +4,12 @@ CAPI=2:
 # SPDX-License-Identifier: Apache-2.0
 name: ${instance_vlnv("lowrisc:ip:alert_handler:0.1")}
 description: "Alert Handler"
-virtual:
-  - lowrisc:ip_interfaces:alert_handler
 
 filesets:
   files_rtl:
     depend:
-      - lowrisc:ip:alert_handler_component
-      - ${instance_vlnv("lowrisc:ip_interfaces:alert_handler_reg:0.1")}
+      - ${instance_vlnv("lowrisc:ip:alert_handler_component:0.1")}
+      - ${instance_vlnv("lowrisc:ip:alert_handler_reg:0.1")}
     file_type: systemVerilogSource
 
 parameters:

hw/ip_templates/alert_handler/alert_handler_component.core → hw/ip_templates/alert_handler/alert_handler_component.core.tpl

@@ -2,7 +2,7 @@ CAPI=2:
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-name: "lowrisc:ip:alert_handler_component:0.1"
+name: ${instance_vlnv("lowrisc:ip:alert_handler_component:0.1")}
 description: "Alert Handler component without the CSRs"
 
 filesets:
@@ -17,9 +17,8 @@ filesets:
       - lowrisc:prim:buf
       - lowrisc:prim:mubi
       - lowrisc:prim:sparse_fsm
-      - lowrisc:ip_interfaces:alert_handler_reg
+      - ${instance_vlnv("lowrisc:ip:alert_handler_reg")}
     files:
-      - rtl/alert_pkg.sv
       - rtl/alert_handler_reg_wrap.sv
       - rtl/alert_handler_lpg_ctrl.sv
       - rtl/alert_handler_class.sv

hw/ip_templates/alert_handler/alert_handler_pkg.core.tpl

@@ -0,0 +1,44 @@
+CAPI=2:
+# Copyright lowRISC contributors (OpenTitan project).
+# Licensed under the Apache License, Version 2.0, see LICENSE for details.
+# SPDX-License-Identifier: Apache-2.0
+name: ${instance_vlnv("lowrisc:ip:alert_handler_pkg:0.1")}
+description: "Alert Handler constants in packages"
+virtual:
+  - "lowrisc:ip_interfaces:alert_handler_pkg"
+
+filesets:
+  files_rtl:
+    depend:
+      - lowrisc:tlul:headers
+    files:
+      - rtl/alert_handler_reg_pkg.sv
+      - rtl/alert_pkg.sv
+    file_type: systemVerilogSource
+
+  files_verilator_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+
+  files_ascentlint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+
+  files_veriblelint_waiver:
+    depend:
+      # common waivers
+      - lowrisc:lint:common
+      - lowrisc:lint:comportable
+
+
+targets:
+  default: &default_target
+    filesets:
+      - tool_verilator   ? (files_verilator_waiver)
+      - tool_ascentlint  ? (files_ascentlint_waiver)
+      - tool_veriblelint ? (files_veriblelint_waiver)
+      - files_rtl

hw/ip_templates/alert_handler/alert_handler_reg.core.tpl

@@ -4,18 +4,15 @@ CAPI=2:
 # SPDX-License-Identifier: Apache-2.0
 name: ${instance_vlnv("lowrisc:ip:alert_handler_reg:0.1")}
 description: "Auto-generated alert handler register sources"
-virtual:
-  - "lowrisc:ip_interfaces:alert_handler_reg"
 
 filesets:
   files_rtl:
     depend:
-      - lowrisc:tlul:headers
       - lowrisc:prim:subreg
       - lowrisc:ip:tlul
       - lowrisc:prim:subreg
+      - ${instance_vlnv("lowrisc:ip:alert_handler_pkg")}
     files:
-      - rtl/alert_handler_reg_pkg.sv
       - rtl/alert_handler_reg_top.sv
     file_type: systemVerilogSource
 

hw/ip_templates/alert_handler/data/alert_handler.hjson.tpl

@@ -121,6 +121,8 @@ chars = ['A', 'B', 'C', 'D', 'E', 'F', 'G', 'H']
     { name: "N_ESC_SEV",
       desc: "Number of escalation severities",
       type: "int",
+      # NOTE: If this value is to be changed, ensure all IPs with
+      # prim_esc_receiver get updated as well.
       default: "4",
       local: "true"
     },
@@ -139,6 +141,8 @@ chars = ['A', 'B', 'C', 'D', 'E', 'F', 'G', 'H']
     { name: "PING_CNT_DW",
       desc: "Width of ping counter",
       type: "int",
+      # NOTE: If this value is to be changed, ensure all IPs with
+      # prim_esc_receiver get updated as well.
       default: "16",
       local: "true"
     },

hw/ip_templates/alert_handler/data/alert_handler.tpldesc.hjson

@@ -51,5 +51,11 @@
       type: "object"
       default: []
     }
+    {
+      name: "top_pkg_vlnv"
+      desc: "Provides the VLNV for the top_pkg used by this alert_handler"
+      type: "string"
+      default: "lowrisc:constants:top_pkg"
+    }
   ]
 }

hw/ip_templates/alert_handler/dv/alert_handler_sim.core.tpl

@@ -13,8 +13,8 @@ filesets:
   files_dv:
     depend:
       - lowrisc:dv:ralgen
-      - lowrisc:dv:alert_handler_tb
-      - lowrisc:dv:alert_handler_cov
+      - ${instance_vlnv("lowrisc:dv:alert_handler_tb:0.1")}
+      - ${instance_vlnv("lowrisc:dv:alert_handler_cov:0.1")}
       - ${instance_vlnv("lowrisc:dv:alert_handler_sva:0.1")}
     file_type: systemVerilogSource
 

hw/ip_templates/alert_handler/dv/cov/alert_handler_cov.core → hw/ip_templates/alert_handler/dv/cov/alert_handler_cov.core.tpl

@@ -2,12 +2,12 @@ CAPI=2:
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-name: "lowrisc:dv:alert_handler_cov"
+name: ${instance_vlnv("lowrisc:dv:alert_handler_cov:0.1")}
 description: "ALERT_HANDLER cov bind files"
 filesets:
   files_dv:
     depend:
-      - lowrisc:ip:alert_handler_component  # import alert_pkg
+      - ${instance_vlnv("lowrisc:ip:alert_handler_component:0.1")}  # import alert_pkg
       - lowrisc:dv:dv_utils
     files:
       - alert_handler_cov_bind.sv

hw/ip_templates/alert_handler/dv/env/alert_handler_env.core → hw/ip_templates/alert_handler/dv/env/alert_handler_env.core.tpl

@@ -2,14 +2,15 @@ CAPI=2:
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-name: "lowrisc:dv:alert_handler_env:0.1"
+name: ${instance_vlnv("lowrisc:dv:alert_handler_env:0.1")}
 description: "ALERT_HANDLER DV UVM environment"
 filesets:
   files_dv:
     depend:
       - lowrisc:dv:cip_lib
-      - lowrisc:ip:alert_handler_component  # import alert_pkg
-      - lowrisc:prim:mubi  # import prim_mubi_pkg
+      - ${instance_vlnv("lowrisc:ip:alert_handler_pkg:0.1")}
+      - lowrisc:prim:mubi_pkg
+      - ${top_pkg_vlnv}
     files:
       - alert_handler_env_pkg.sv
       - alert_handler_if.sv

hw/ip_templates/alert_handler/dv/tb/alert_handler_tb.core → hw/ip_templates/alert_handler/dv/tb/alert_handler_tb.core.tpl

@@ -2,12 +2,12 @@ CAPI=2:
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-name: "lowrisc:dv:alert_handler_tb:0.1"
+name: ${instance_vlnv("lowrisc:dv:alert_handler_tb:0.1")}
 description: "ALERT_HANDLER UVM TB environment"
 filesets:
   files_dv:
     depend:
-      - lowrisc:dv:alert_handler_test:0.1
+      - ${instance_vlnv("lowrisc:dv:alert_handler_test:0.1")}
     files:
       - tb.sv
     file_type: systemVerilogSource

hw/ip_templates/alert_handler/dv/tests/alert_handler_test.core → hw/ip_templates/alert_handler/dv/tests/alert_handler_test.core.tpl

@@ -2,12 +2,12 @@ CAPI=2:
 # Copyright lowRISC contributors (OpenTitan project).
 # Licensed under the Apache License, Version 2.0, see LICENSE for details.
 # SPDX-License-Identifier: Apache-2.0
-name: "lowrisc:dv:alert_handler_test:0.1"
+name: ${instance_vlnv("lowrisc:dv:alert_handler_test:0.1")}
 description: "ALERT_HANDLER DV UVM test"
 filesets:
   files_dv:
     depend:
-      - lowrisc:dv:alert_handler_env
+      - ${instance_vlnv("lowrisc:dv:alert_handler_env")}
     files:
       - alert_handler_test_pkg.sv
       - alert_handler_base_test.sv: {is_include_file: true}

hw/ip_templates/clkmgr/clkmgr.core.tpl

@@ -4,14 +4,12 @@ CAPI=2:
 # SPDX-License-Identifier: Apache-2.0
 name: ${instance_vlnv("lowrisc:ip:clkmgr:0.1")}
 description: "Top specific clock manager "
-virtual:
-  - lowrisc:ip_interfaces:clkmgr
 
 filesets:
   files_rtl:
     depend:
       - lowrisc:ip:lc_ctrl_pkg
-      - lowrisc:ip_interfaces:pwrmgr_pkg
+      - ${instance_vlnv("lowrisc:ip:pwrmgr_pkg", pwrmgr_vlnv_prefix)}
       - lowrisc:ip:tlul
       - lowrisc:prim:all
       - lowrisc:prim:buf

hw/ip_templates/clkmgr/clkmgr_pkg.core.tpl

@@ -10,8 +10,6 @@ virtual:
 filesets:
   files_rtl:
     depend:
-      - lowrisc:constants:top_pkg
-      - lowrisc:ip_interfaces:pwrmgr_pkg
       - lowrisc:prim:mubi
     files:
       - rtl/clkmgr_pkg.sv

hw/ip_templates/clkmgr/clkmgr_reg.core.tpl

@@ -4,13 +4,14 @@ CAPI=2:
 # SPDX-License-Identifier: Apache-2.0
 name: ${instance_vlnv("lowrisc:ip:clkmgr_reg:0.1")}
 description: "Clock manager registers"
-virtual:
-  - lowrisc:ip_interfaces:clkmgr_reg
 
 filesets:
   files_rtl:
     depend:
       - lowrisc:tlul:headers
+      - lowrisc:prim:assert
+      - lowrisc:prim:mubi_pkg
+      - lowrisc:prim:subreg
     files:
       - rtl/clkmgr_reg_pkg.sv
       - rtl/clkmgr_reg_top.sv