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Cleaned up source
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Co-authored-by: Victor Roest <[email protected]>
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jdonszelmann and Victor Roest committed Mar 8, 2020
1 parent c540860 commit 6e79bbc
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Showing 38 changed files with 118 additions and 1,047 deletions.
2 changes: 1 addition & 1 deletion kernel/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,7 @@ CFLAGS += -pipe -std=gnu99 -ffreestanding -Wall -Werror -g -O0 -mcpu=arm1176jzf-

# variables to define in the preprocessor.
MEMORY = 1G
DEFINITIONS = MEM_DEBUG ENABLE_TESTS
DEFINITIONS = MEM_DEBUG
#DEFINITIONS = MEM_DEBUG
test: DEFINITIONS += ENABLE_TESTS # if we execute the test: rule, enable tests before recompiling
KERNEL_PARAMS = root=/dev/ram mem=$(MEMORY)
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Original file line number Diff line number Diff line change
@@ -1,7 +1,6 @@
#include "klibc.h"
#include <mem_alloc.h>
#include <allocator.h>
#include <vm.h>
#include <string.h>
#include <vm2.h>
#include <interrupt.h>
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66 changes: 0 additions & 66 deletions kernel/src/common/include/argparse.h

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1 change: 1 addition & 0 deletions kernel/src/common/include/interrupt.h
Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,7 @@
#define BRANCH_INSTRUCTION 0xe59ff018 // ldr pc, pc+offset (where offset is 0x20 bytes)

// System Call Types
// TODO: maybe make enum?
#define SYSCALL_CREATE 0
#define SYSCALL_SWITCH 1
#define SYSCALL_DELETE 2
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99 changes: 47 additions & 52 deletions kernel/src/common/interrupt.c
Original file line number Diff line number Diff line change
@@ -1,11 +1,8 @@
#include <interrupt.h>
#include <mmap.h>
#include <memory.h>
#include <interrupt.h>
#include <stdio.h>
#include <stdlib.h>
#include <vm2.h>
#include <chipset.h>
#include <mmio.h>

/* copy vector table from wherever QEMU loads the kernel to 0x00 */
void init_vector_table() {
Expand Down Expand Up @@ -42,52 +39,44 @@ void init_vector_table() {
}

/* handlers */
void reset_handler(void)
{
kprintf("RESET HANDLER\n");
void reset_handler(void) {
INFO("RESET HANDLER\n");
_Reset();
}

void __attribute__((interrupt("UNDEF"))) undef_instruction_handler(void)
{
int spsr, lr;
void __attribute__((interrupt("UNDEF"))) undef_instruction_handler() {
size_t spsr, lr;

asm volatile("mrs %0, spsr" : "=r"(spsr));
asm volatile("mov %0, lr" : "=r" (lr));

int thumb = spsr & 0x20;
int pc = thumb ? lr - 0x2 : lr - 0x4;
size_t thumb = spsr & 0x20u;
size_t pc = thumb ? lr - 0x2u : lr - 0x4u;

if ((*(size_t *) pc) == UNDEFINED_INSTRUCTION_BYTES){
kprintf("FATAL ERROR\n");
panic();
}

kprintf("UNDEFINED INSTRUCTION HANDLER\n");
WARN("UNDEFINED INSTRUCTION HANDLER");

int copro = (*(int*)pc & 0xf00000) >> 24;
size_t copro = (*(size_t *)pc & 0xf00000u) >> 24u;

if (spsr & 0x20) {
kprintf("THUMB mode\n");
if (spsr & 0x20u) {
WARN("THUMB mode");
} else {
kprintf("ARM mode\n");
WARN("ARM mode");
}
if (spsr & 0x1000000) {
kprintf("JAZELLE enabled\n");
if (spsr & 0x1000000u) {
WARN("JAZELLE enabled");
}

kprintf("COPRO: %x\n", copro);
kprintf("violating instruction (at %x): %x\n", pc, *((int *) pc));
if (pc >= V_KERNBASE && pc < V_KERNTOP)
{
kprintf("(instruction is in kernel address range)\n");
WARN("COPRO: 0x%x", copro);
WARN("violating instruction (at 0x%x): 0x%x", pc, *((size_t *) pc));
if (pc >= KERNEL_VIRTUAL_START && pc < KERNEL_VIRTUAL_END) {
WARN("(instruction is in kernel address range)");
}

panic();
FATAL("UNDEFINED INSTRUCTION HANDLER");
}

long __attribute__((interrupt("SWI"))) software_interrupt_handler(void)
{
long __attribute__((interrupt("SWI"))) software_interrupt_handler(void) {
int callNumber = 0, r0 = 0, r1 = 0, r2 = 0, r3 = 0;

asm volatile ("MOV %0, r7":"=r"(callNumber)::);
Expand Down Expand Up @@ -188,15 +177,11 @@ long __attribute__((interrupt("SWI"))) software_interrupt_handler(void)
}
}

void __attribute__((interrupt("ABORT"))) prefetch_abort_handler(void)
{
int lr;

void __attribute__((interrupt("ABORT"))) prefetch_abort_handler(void) {
size_t lr;
asm volatile("mov %0, lr" : "=r" (lr));

kprintf("PREFETCH ABORT HANDLER, violating address: %x\n", (lr - 4));

panic();
FATAL("PREFETCH ABORT HANDLER, violating address: 0x%x", (lr - 4u));
}

void __attribute__((interrupt("ABORT"))) data_abort_handler(void) {
Expand All @@ -207,20 +192,20 @@ void __attribute__((interrupt("ABORT"))) data_abort_handler(void) {
asm volatile("mov %0, lr" : "=r" (lr));
int pc = lr - 8;

int far;
uint32_t far;
asm volatile("mrc p15, 0, %0, c6, c0, 0" : "=r" (far));

DEBUG("DATA ABORT HANDLER (Page Fault)");
DEBUG("faulting address: 0x%x", far);
WARN("DATA ABORT HANDLER (Page Fault)");
WARN("faulting address: 0x%x", far);
if (far >= KERNEL_VIRTUAL_OFFSET) {
DEBUG("(address is in kernel address range)\n");
DEBUG("(address is in kernel address range)");
}
DEBUG("violating instruction (at 0x%x): %x", pc, *((int *) pc));
WARN("violating instruction (at 0x%x): 0x%x", pc, *((int *) pc));

// Get the Data Fault Status Register
int dfsr;
asm volatile("MRC p15, 0, %0, c5, c0, 0" : "=r" (dfsr));
DEBUG("DFSR: 0x%x", dfsr);
WARN("DFSR: 0x%x", dfsr);


#ifdef ENABLE_TESTS
Expand All @@ -234,8 +219,9 @@ void reserved_handler(void)
}

// the attribute automatically saves and restores state
// TODO: We might not want that! (context switches etc)
void __attribute__((interrupt("IRQ"))) irq_handler(void) {
kprintf("IRQ HANDLER\n");
DEBUG("IRQ HANDLER");
return chipset.handle_irq();

// int * pendingregister = (int *) 0x40000060;
Expand All @@ -260,7 +246,7 @@ void __attribute__((interrupt("IRQ"))) irq_handler(void) {
}

void __attribute__((interrupt("FIQ"))) fiq_handler(void) {
kprintf("FIQ HANDLER\n");
DEBUG("FIQ HANDLER\n");
return chipset.handle_fiq();

// handle_irq_interrupt(interrupt_registers->fiq_control & 0x7f);
Expand All @@ -283,7 +269,7 @@ void __attribute__((always_inline)) inline SemihostingCall(enum SemihostingSWI m

/* enable IRQ and/or FIQ */
void enable_interrupt(InterruptType mask) {
kprintf("Enabling interrupts with mask %i\n", mask);
INFO("Enabling interrupts with mask %i", mask);

// enable interrupt on the core
switch (mask) {
Expand All @@ -296,12 +282,15 @@ void enable_interrupt(InterruptType mask) {
case BOTH:
asm volatile("cpsie if");
break;
default:
/** should never happen **/
return;
}
}

/* disable IRQ and/or FIQ */
void disable_interrupt(InterruptType mask) {
kprintf("Disabling interrupts with mask %i\n", mask);
INFO("Disabling interrupts with mask %i", mask);

// disable interrupts on the core
switch (mask) {
Expand All @@ -314,13 +303,16 @@ void disable_interrupt(InterruptType mask) {
case BOTH:
asm volatile("cpsid if");
break;
default:
/** should never happen **/
return;
}
}

/* disable IRQ and/or FIQ, but also return a copy of the CPSR */
int disable_interrupt_save(InterruptType mask) {

kprintf("Disabling interrupts (save) with mask %i\n", mask);
INFO("Disabling interrupts (save) with mask %i", mask);

/* get a copy of the current process status register */
int cpsr;
Expand All @@ -336,20 +328,23 @@ int disable_interrupt_save(InterruptType mask) {
case BOTH:
asm volatile("cpsid if");
break;
default:
/** should never happen **/
return -1;
}
return cpsr;
}

/* return a full 32-bit copy of the current process status register */
int get_proc_status() {
int cpsr;
size_t get_proc_status() {
size_t cpsr;
asm volatile("mrs %0, cpsr" : "=r"(cpsr));
return cpsr;
}

/* restore control status (interrupt, mode bits) of the cpsr */
/* (e.g. when we return from a handler, restore value from
disable_interrupt_save */
void restore_proc_status(int cpsr) {
void restore_proc_status(size_t cpsr) {
asm volatile("msr cpsr_c, %0" : : "r"(cpsr));
}
13 changes: 1 addition & 12 deletions kernel/src/common/start.c
Original file line number Diff line number Diff line change
Expand Up @@ -78,18 +78,7 @@ void start(uint32_t *p_bootargs) {
// If we return, the tests failed.
SemihostingCall(OSSpecific);
#endif
kprintf("done parsing atag list\n");

//init_kheap(31 * 0x100000);
//init_uheap(0x100000);

//initialize pcb table and PID
/* init_all_processes(); */
//print_process_state(0);
//run_process_tests();
//print_PID();
// init_q();
//common();

// TODO:
// * Mount vfs
Expand All @@ -98,6 +87,6 @@ void start(uint32_t *p_bootargs) {

asm volatile("cpsie i");

kprintf("End of start method.\n");
INFO("End of boot sequence.\n");
SLEEP;
}
2 changes: 1 addition & 1 deletion kernel/src/drivers/chipset/bcm2836/bcm2836.c
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf
#include <bcm2836.h>
#include <chipset.h>
#include <mmap.h>
#include <mmio.h>
#include <interrupt.h>
#include <stdio.h>
#include <vm2.h>
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2 changes: 1 addition & 1 deletion kernel/src/drivers/chipset/bcm2836/timer.c
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
#include <bcm2836.h>
#include <stdio.h>
#include <mmap.h>
#include <mmio.h>
#include <chipset.h>

inline static uint32_t get_frequency() {
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7 changes: 2 additions & 5 deletions kernel/src/klibc/include/klibc.h
Original file line number Diff line number Diff line change
Expand Up @@ -85,12 +85,9 @@ unsigned int rand();
#else
#define INFO(...)
#endif
//#define WARN(format, ...) kprintf("\e[38;5;208m[WARN] " format "\e[0m\n", ##__VA_ARGS__)
#define WARN(format, ...) kprintf("\e[38;5;208m[WARN] " format "\e[0m\n", ##__VA_ARGS__)


// Defines an instruction that will raise an undefined instruction code on both ARM (and hopefully THUMB2)
#define UNDEFINED_INSTRUCTION_BYTES 0xF7F1A2F3
#define STRINGIFY2(X) #X
#define STRINGIFY(X) STRINGIFY2(X)
#define FATAL(format, ...) kprintf("\e[38;5;160m[FATAL] \e[38;5;208m%s:%i\e[38;5;160m " format "\e[0m\n", __FILE__, __LINE__, ##__VA_ARGS__); panic()

//4-17-15: Initial panic * assert_fail functions added
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2 changes: 1 addition & 1 deletion kernel/src/klibc/klibc.c
Original file line number Diff line number Diff line change
Expand Up @@ -71,7 +71,7 @@ void splash() {
kprintf("\t██╔════╝██║ ██║██╔══██╗██╔════╝██╔════╝██╔═══██╗ ██╔═══██╗██╔════╝\n");
kprintf("\t██║ ██║ ██║██████╔╝███████╗█████╗ ██║ ██║ ██║ ██║███████╗\n");
kprintf("\t██║ ██║ ██║██╔══██╗╚════██║██╔══╝ ██║ ██║ ██║ ██║╚════██║\n");
kprintf("\t╚██████╗╚██████╔╝██║ ██║███████║███████╗██████╔╝ ╚██████╔╝██████║\n\n");
kprintf("\t╚██████╗╚██████╔╝██║ ██║███████║███████╗██████╔╝ ╚██████╔╝██████║\n\n\n");
}

/*4-17-15: - Prakash
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