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uart: fixed packet assembly by length
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sespivak committed Jul 30, 2022
1 parent 45264f3 commit b9debf6
Showing 1 changed file with 1 addition and 1 deletion.
2 changes: 1 addition & 1 deletion decoders/uart/pd.py
Original file line number Diff line number Diff line change
Expand Up @@ -229,7 +229,7 @@ def start(self):
self.bw = (self.options['data_bits'] + 7) // 8
packet_idle_us = self.options['packet_idle_us']
self.packet_idle_samples = int(round(packet_idle_us * 1e-6 * self.samplerate))
if not self.packet_idle_samples >= 0:
if not self.packet_idle_samples > 0:
self.packet_idle_samples = None

def metadata(self, key, value):
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