Merge pull request #58 from slaclab/pre-release

Release Candidate v5.11.0
slaclab · Oct 3, 2024 · 546b2ed · 546b2ed
2 parents 876dc60 + abc46e7
commit 546b2ed
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diff --git a/.github/workflows/lcls2_pgp_ci.yml b/.github/workflows/lcls2_pgp_ci.yml
@@ -42,89 +42,24 @@ jobs:
           python -m compileall -f python/
           flake8 --count python/
 
+# ----------------------------------------------------------------------------
+
   gen_release:
-    name: Generate Release
-    runs-on: ubuntu-20.04
     needs: [test_and_document]
-    if: startsWith(github.ref, 'refs/tags/')
-    steps:
-
-      - uses: actions/checkout@v2
-        with:
-          fetch-depth: 0
-
-      - uses: actions/setup-python@v2
-        with:
-          python-version: 3.8
-
-      - name: Get Image Information
-        id: get_image_info
-        run: |
-          echo ::set-output name=tag::`git describe --tags`
+    uses: slaclab/ruckus/.github/workflows/gen_release.yml@main
+    with:
+      version: '1.0.0'
+    secrets:
+      GH_TOKEN: ${{ secrets.GH_TOKEN }}
 
-      - name: Get Ruckus
-        run: |
-          git clone https://github.com/slaclab/ruckus.git
-          python -m pip install --upgrade pip
-          pip install -r ruckus/scripts/pip_requirements.txt
-
-      - name: Gen Release
-        env:
-          TRAVIS_REPO_SLUG: ${{ github.repository }}
-          TRAVIS_TAG: ${{ steps.get_image_info.outputs.tag }}
-          GH_REPO_TOKEN: ${{ secrets.GH_TOKEN }}
-        run: |
-          python ruckus/scripts/releaseGen.py
+# ----------------------------------------------------------------------------
 
-  conda_build:
-    name: Anaconda Build
+  conda_build_lib:
     needs: [test_and_document]
-    if: startsWith(github.ref, 'refs/tags/')
-    strategy:
-      matrix:
-        os:
-          - ubuntu-20.04
-    runs-on: ${{ matrix.os }}
-    steps:
-
-      # This step checks out a copy of your repository.
-      - uses: actions/checkout@v2
-        with:
-          fetch-depth: 0
-
-      - uses: actions/setup-python@v2
-        with:
-          python-version: 3.8
-
-      - name: Setup anaconda
-        env:
-          OS_NAME: ${{ matrix.os }}
-        run: |
-          cd ${HOME}
-          wget -O miniconda.sh https://repo.continuum.io/miniconda/Miniconda3-latest-Linux-x86_64.sh
-          bash miniconda.sh -b -p ${HOME}/miniconda
-          export PATH="${HOME}/miniconda/bin:$PATH"
-          source ${HOME}/miniconda/etc/profile.d/conda.sh
-          conda config --set always_yes yes
-          conda config --set channel_priority strict
-          conda install -n base conda-libmamba-solver
-          conda config --set solver libmamba
-          conda install conda-build anaconda-client conda-verify
-          conda update -q conda conda-build
-          conda update --all
+    uses: slaclab/ruckus/.github/workflows/conda_build_lib.yml@main
+    with:
+      version: '1.0.0'
+    secrets:
+      CONDA_UPLOAD_TOKEN_TAG: ${{ secrets.CONDA_UPLOAD_TOKEN_TAG }}
 
-      - name: Get Image Information
-        id: get_image_info
-        env:
-          CONDA_UPLOAD_TOKEN_TAG: ${{ secrets.CONDA_UPLOAD_TOKEN_TAG }}
-          OS_NAME: ${{ matrix.os }}
-        run: |
-          echo ::set-output name=token::$CONDA_UPLOAD_TOKEN_TAG
-          echo ::set-output name=os::linux-64
-
-      - name: Build And Upload
-        run: |
-          export PATH="${HOME}/miniconda/bin:$PATH"
-          source ${HOME}/miniconda/etc/profile.d/conda.sh
-          conda build --debug conda-recipe --output-folder bld-dir -c tidair-tag -c tidair-packages -c conda-forge
-          anaconda -t ${{ steps.get_image_info.outputs.token }} upload --force bld-dir/noarch/*.tar.bz2
+# ----------------------------------------------------------------------------
diff --git a/conda-recipe/build.sh b/conda-recipe/build.sh
@@ -1,4 +1,4 @@
 #!/usr/bin/bash
-  
+
 python setup.py install
 
diff --git a/hardware/SlacPgpCardG4/xdc/Pgp2bTiming.xdc b/hardware/SlacPgpCardG4/xdc/Pgp2bTiming.xdc
@@ -1,10 +1,10 @@
 ##############################################################################
 ## This file is part of LCLS2 PGP Firmware Library'.
-## It is subject to the license terms in the LICENSE.txt file found in the 
-## top-level directory of this distribution and at: 
-##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. 
-## No part of LCLS2 PGP Firmware Library', including this file, 
-## may be copied, modified, propagated, or distributed except according to 
+## It is subject to the license terms in the LICENSE.txt file found in the
+## top-level directory of this distribution and at:
+##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
+## No part of LCLS2 PGP Firmware Library', including this file,
+## may be copied, modified, propagated, or distributed except according to
 ## the terms contained in the LICENSE.txt file.
 ##############################################################################
 

diff --git a/hardware/SlacPgpCardG4/xdc/Pgp4Timing.xdc b/hardware/SlacPgpCardG4/xdc/Pgp4Timing.xdc
@@ -1,10 +1,10 @@
 ##############################################################################
 ## This file is part of LCLS2 PGP Firmware Library'.
-## It is subject to the license terms in the LICENSE.txt file found in the 
-## top-level directory of this distribution and at: 
-##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. 
-## No part of LCLS2 PGP Firmware Library', including this file, 
-## may be copied, modified, propagated, or distributed except according to 
+## It is subject to the license terms in the LICENSE.txt file found in the
+## top-level directory of this distribution and at:
+##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
+## No part of LCLS2 PGP Firmware Library', including this file,
+## may be copied, modified, propagated, or distributed except according to
 ## the terms contained in the LICENSE.txt file.
 ##############################################################################
 

diff --git a/hardware/SlacPgpCardG4/xdc/SlacPgpCardG4Hsio.xdc b/hardware/SlacPgpCardG4/xdc/SlacPgpCardG4Hsio.xdc
@@ -1,18 +1,18 @@
 ##############################################################################
 ## This file is part of LCLS2 PGP Firmware Library'.
-## It is subject to the license terms in the LICENSE.txt file found in the 
-## top-level directory of this distribution and at: 
-##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. 
-## No part of LCLS2 PGP Firmware Library', including this file, 
-## may be copied, modified, propagated, or distributed except according to 
+## It is subject to the license terms in the LICENSE.txt file found in the
+## top-level directory of this distribution and at:
+##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
+## No part of LCLS2 PGP Firmware Library', including this file,
+## may be copied, modified, propagated, or distributed except according to
 ## the terms contained in the LICENSE.txt file.
 ##############################################################################
 
-#### Base Clocks 
-create_generated_clock -name clk156 [get_pins {U_axilClk/PllGen.U_Pll/CLKOUT0}] 
+#### Base Clocks
+create_generated_clock -name clk156 [get_pins {U_axilClk/PllGen.U_Pll/CLKOUT0}]
 
-create_generated_clock -name clk119 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[0].U_refClkDiv2/O}] 
-create_generated_clock -name clk186 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[1].U_refClkDiv2/O}] 
+create_generated_clock -name clk119 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[0].U_refClkDiv2/O}]
+create_generated_clock -name clk186 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[1].U_refClkDiv2/O}]
 
 #### GT Out Clocks
 create_clock -name timingGtRxOutClk0  -period 8.403 \
@@ -160,12 +160,12 @@ set_false_path -to [get_pins {*/U_TimingRx/U_TXCLK/CE*}]
 set_clock_groups -asynchronous \
     -group [get_clocks -include_generated_clocks {clk156}] \
     -group [get_clocks -include_generated_clocks {timingGtRxOutClk0}] \
-    -group [get_clocks -include_generated_clocks {timingGtRxOutClk1}] \    
+    -group [get_clocks -include_generated_clocks {timingGtRxOutClk1}] \
     -group [get_clocks -include_generated_clocks {timingGtTxOutClk0}] \
     -group [get_clocks -include_generated_clocks {timingGtTxOutClk1}] \
     -group [get_clocks -include_generated_clocks {sfpRefClkP0}]  \
     -group [get_clocks -include_generated_clocks {sfpRefClkP1}] \
-    -group [get_clocks -include_generated_clocks {dmaClk}] 
+    -group [get_clocks -include_generated_clocks {dmaClk}]
 
 # set_clock_groups -asynchronous \
 #     -group [get_clocks {clk156}] \

diff --git a/hardware/XilinxKcu1500/xdc/Kcu1500Hsio.xdc b/hardware/XilinxKcu1500/xdc/Kcu1500Hsio.xdc
@@ -1,24 +1,24 @@
 ##############################################################################
 ## This file is part of LCLS2 PGP Firmware Library'.
-## It is subject to the license terms in the LICENSE.txt file found in the 
-## top-level directory of this distribution and at: 
-##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. 
-## No part of LCLS2 PGP Firmware Library', including this file, 
-## may be copied, modified, propagated, or distributed except according to 
+## It is subject to the license terms in the LICENSE.txt file found in the
+## top-level directory of this distribution and at:
+##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
+## No part of LCLS2 PGP Firmware Library', including this file,
+## may be copied, modified, propagated, or distributed except according to
 ## the terms contained in the LICENSE.txt file.
 ##############################################################################
 
-#### Base Clocks 
-create_generated_clock -name clk156 [get_pins {U_axilClk/PllGen.U_Pll/CLKOUT0}] 
-create_generated_clock -name clk25  [get_pins {U_axilClk/PllGen.U_Pll/CLKOUT1}] 
+#### Base Clocks
+create_generated_clock -name clk156 [get_pins {U_axilClk/PllGen.U_Pll/CLKOUT0}]
+create_generated_clock -name clk25  [get_pins {U_axilClk/PllGen.U_Pll/CLKOUT1}]
 
 set_property CLOCK_DEDICATED_ROUTE BACKBONE [get_nets U_axilClk/clkOut[1]]
 
-create_generated_clock -name clk238 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_MMCM.U_238MHz/MmcmGen.U_Mmcm/CLKOUT0}] 
-create_generated_clock -name clk371 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_MMCM.U_371MHz/MmcmGen.U_Mmcm/CLKOUT0}] 
+create_generated_clock -name clk238 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_MMCM.U_238MHz/MmcmGen.U_Mmcm/CLKOUT0}]
+create_generated_clock -name clk371 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_MMCM.U_371MHz/MmcmGen.U_Mmcm/CLKOUT0}]
 
-create_generated_clock -name clk119 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[0].U_refClkDiv2/O}] 
-create_generated_clock -name clk186 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[1].U_refClkDiv2/O}] 
+create_generated_clock -name clk119 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[0].U_refClkDiv2/O}]
+create_generated_clock -name clk186 [get_pins -hier -filter {name =~ */U_TimingRx/GEN_VEC[1].U_refClkDiv2/O}]
 
 #### GT Out Clocks
 create_clock -name timingGtRxOutClk0  -period 8.403 \
@@ -166,12 +166,12 @@ set_false_path -to [get_pins {*/U_TimingRx/U_TXCLK/CE*}]
 set_clock_groups -asynchronous \
     -group [get_clocks -include_generated_clocks {clk156}] \
     -group [get_clocks -include_generated_clocks {timingGtRxOutClk0}] \
-    -group [get_clocks -include_generated_clocks {timingGtRxOutClk1}] \    
+    -group [get_clocks -include_generated_clocks {timingGtRxOutClk1}] \
     -group [get_clocks -include_generated_clocks {timingGtTxOutClk0}] \
     -group [get_clocks -include_generated_clocks {timingGtTxOutClk1}] \
     -group [get_clocks -include_generated_clocks {clk238}]  \
     -group [get_clocks -include_generated_clocks {clk371}] \
-    -group [get_clocks -include_generated_clocks {dmaClk}] 
+    -group [get_clocks -include_generated_clocks {dmaClk}]
 
 # set_clock_groups -asynchronous \
 #     -group [get_clocks {clk156}] \

diff --git a/hardware/XilinxKcu1500/xdc/Pgp2bTiming.xdc b/hardware/XilinxKcu1500/xdc/Pgp2bTiming.xdc
@@ -1,39 +1,39 @@
 ##############################################################################
 ## This file is part of LCLS2 PGP Firmware Library'.
-## It is subject to the license terms in the LICENSE.txt file found in the 
-## top-level directory of this distribution and at: 
-##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. 
-## No part of LCLS2 PGP Firmware Library', including this file, 
-## may be copied, modified, propagated, or distributed except according to 
+## It is subject to the license terms in the LICENSE.txt file found in the
+## top-level directory of this distribution and at:
+##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
+## No part of LCLS2 PGP Firmware Library', including this file,
+## may be copied, modified, propagated, or distributed except according to
 ## the terms contained in the LICENSE.txt file.
 ##############################################################################
 
-create_generated_clock -name pgp2bPhyRxClk0 [get_pins -hier -filter {name =~ */GEN_LANE[0].GEN_PGP2b.U_Lane/*/RXOUTCLK}] 
-create_generated_clock -name pgp2bPhyTxClk0 [get_pins -hier -filter {name =~ */GEN_LANE[0].GEN_PGP2b.U_Lane/*/TXOUTCLK}]      
+create_generated_clock -name pgp2bPhyRxClk0 [get_pins -hier -filter {name =~ */GEN_LANE[0].GEN_PGP2b.U_Lane/*/RXOUTCLK}]
+create_generated_clock -name pgp2bPhyTxClk0 [get_pins -hier -filter {name =~ */GEN_LANE[0].GEN_PGP2b.U_Lane/*/TXOUTCLK}]
 
-create_generated_clock -name pgp2bPhyRxClk1  [get_pins -hier -filter {name =~ */GEN_LANE[1].GEN_PGP2b.U_Lane/*/RXOUTCLK}] 
-create_generated_clock -name pgp2bPhyTxClk1  [get_pins -hier -filter {name =~ */GEN_LANE[1].GEN_PGP2b.U_Lane/*/TXOUTCLK}]      
+create_generated_clock -name pgp2bPhyRxClk1  [get_pins -hier -filter {name =~ */GEN_LANE[1].GEN_PGP2b.U_Lane/*/RXOUTCLK}]
+create_generated_clock -name pgp2bPhyTxClk1  [get_pins -hier -filter {name =~ */GEN_LANE[1].GEN_PGP2b.U_Lane/*/TXOUTCLK}]
 
-create_generated_clock -name pgp2bPhyRxClk2  [get_pins -hier -filter {name =~ */GEN_LANE[2].GEN_PGP2b.U_Lane/*/RXOUTCLK}] 
-create_generated_clock -name pgp2bPhyTxClk2  [get_pins -hier -filter {name =~ */GEN_LANE[2].GEN_PGP2b.U_Lane/*/TXOUTCLK}]      
+create_generated_clock -name pgp2bPhyRxClk2  [get_pins -hier -filter {name =~ */GEN_LANE[2].GEN_PGP2b.U_Lane/*/RXOUTCLK}]
+create_generated_clock -name pgp2bPhyTxClk2  [get_pins -hier -filter {name =~ */GEN_LANE[2].GEN_PGP2b.U_Lane/*/TXOUTCLK}]
 
-create_generated_clock -name pgp2bPhyRxClk3  [get_pins -hier -filter {name =~ */GEN_LANE[3].GEN_PGP2b.U_Lane/*/RXOUTCLK}] 
-create_generated_clock -name pgp2bPhyTxClk3  [get_pins -hier -filter {name =~ */GEN_LANE[3].GEN_PGP2b.U_Lane/*/TXOUTCLK}]      
+create_generated_clock -name pgp2bPhyRxClk3  [get_pins -hier -filter {name =~ */GEN_LANE[3].GEN_PGP2b.U_Lane/*/RXOUTCLK}]
+create_generated_clock -name pgp2bPhyTxClk3  [get_pins -hier -filter {name =~ */GEN_LANE[3].GEN_PGP2b.U_Lane/*/TXOUTCLK}]
 
 set_clock_groups -asynchronous \
     -group [get_clocks -include_generated_clocks {pgp2bPhyRxClk0}] \
-    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk0}] 
+    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk0}]
 
 
 set_clock_groups -asynchronous \
     -group [get_clocks -include_generated_clocks {pgp2bPhyRxClk1}] \
-    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk1}] 
+    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk1}]
 
 set_clock_groups -asynchronous \
     -group [get_clocks -include_generated_clocks {pgp2bPhyRxClk2}] \
-    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk2}] 
+    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk2}]
 
 set_clock_groups -asynchronous \
     -group [get_clocks -include_generated_clocks {pgp2bPhyRxClk3}] \
-    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk3}] 
+    -group [get_clocks -include_generated_clocks {pgp2bPhyTxClk3}]
 
diff --git a/hardware/XilinxKcu1500/xdc/Pgp4Timing.xdc b/hardware/XilinxKcu1500/xdc/Pgp4Timing.xdc
@@ -1,10 +1,10 @@
 ##############################################################################
 ## This file is part of LCLS2 PGP Firmware Library'.
-## It is subject to the license terms in the LICENSE.txt file found in the 
-## top-level directory of this distribution and at: 
-##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html. 
-## No part of LCLS2 PGP Firmware Library', including this file, 
-## may be copied, modified, propagated, or distributed except according to 
+## It is subject to the license terms in the LICENSE.txt file found in the
+## top-level directory of this distribution and at:
+##    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
+## No part of LCLS2 PGP Firmware Library', including this file,
+## may be copied, modified, propagated, or distributed except according to
 ## the terms contained in the LICENSE.txt file.
 ##############################################################################