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Tasmota Release/v5.1 (#170)
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* Delete components/mqtt directory
* add jl1101 PHY
* Delete components/spiffs directory
* add "SOC_ADC_DIGI_RESULT_BYTES" to C2 soc_caps.h
* add xiaomi solo1
* do not abort when no PSRAM found
* Correct REG_SPI_BASE(i)
* Fix audio DAC
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Jason2866 authored Nov 27, 2023
1 parent 3662303 commit 29db12e
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Showing 85 changed files with 239 additions and 5,250 deletions.
87 changes: 0 additions & 87 deletions .github/workflows/docker.yml

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23 changes: 0 additions & 23 deletions .github/workflows/issue_comment.yml

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4 changes: 2 additions & 2 deletions .github/workflows/release_zips.yml
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Expand Up @@ -10,8 +10,8 @@ jobs:
name: Create release zip file
runs-on: ubuntu-20.04
steps:
- name: Create a recursive clone source zip
uses: espressif/github-actions/release_zips@master
- name: Create a recursive clone source and stripped zip
uses: Jason2866/github-actions/release_zips@release_idf
env:
RELEASE_PROJECT_NAME: ESP-IDF
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
13 changes: 0 additions & 13 deletions .gitmodules
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Expand Up @@ -37,15 +37,6 @@
sbom-description = A small and fast ECDH and ECDSA implementation for 8-bit, 32-bit, and 64-bit processors
sbom-hash = 24c60e243580c7868f4334a1ba3123481fe1aa48

[submodule "components/spiffs/spiffs"]
path = components/spiffs/spiffs
url = ../../pellepl/spiffs.git
sbom-version = 0.2-255-g0dbb3f71c5f6
sbom-supplier = Person: Peter Andersson
sbom-url = https://github.com/pellepl/spiffs
sbom-description = Wear-leveled SPI flash file system for embedded devices
sbom-hash = 0dbb3f71c5f6fae3747a9d935372773762baf852

[submodule "components/json/cJSON"]
path = components/json/cJSON
url = ../../DaveGamble/cJSON.git
Expand All @@ -64,10 +55,6 @@
path = components/lwip/lwip
url = ../../espressif/esp-lwip.git

[submodule "components/mqtt/esp-mqtt"]
path = components/mqtt/esp-mqtt
url = ../../espressif/esp-mqtt.git

[submodule "components/protobuf-c/protobuf-c"]
path = components/protobuf-c/protobuf-c
url = ../../protobuf-c/protobuf-c.git
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19 changes: 10 additions & 9 deletions components/driver/dac/dac_continuous.c
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Expand Up @@ -570,16 +570,17 @@ static esp_err_t s_dac_wait_to_load_dma_data(dac_continuous_handle_t handle, uin
DAC_STAILQ_REMOVE(&handle->head, desc, lldesc_s, qe);
}

static bool split_flag = false;
// TASMOTA: remove split because it does some harm and I'm not sure why it was there in the first place. No such code in 4.x
// static bool split_flag = false;
uint8_t *dma_buf = (uint8_t *)desc->buf;
if (buf_size * DAC_16BIT_ALIGN_COEFF < 2 * handle->cfg.buf_size) {
if (!split_flag) {
buf_size >>= 1;
split_flag = true;
} else {
split_flag = false;
}
}
// if (buf_size * DAC_16BIT_ALIGN_COEFF < 2 * handle->cfg.buf_size) {
// if (!split_flag) {
// buf_size >>= 1;
// split_flag = true;
// } else {
// split_flag = false;
// }
// }
size_t load_bytes = s_dac_load_data_into_buf(handle, dma_buf, handle->cfg.buf_size, buf, buf_size);
lldesc_config(desc, LLDESC_HW_OWNED, 1, 0, load_bytes);
desc->size = load_bytes;
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3 changes: 2 additions & 1 deletion components/esp_eth/CMakeLists.txt
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Expand Up @@ -26,7 +26,8 @@ if(CONFIG_ETH_ENABLED)
"src/esp_eth_phy_ip101.c"
"src/esp_eth_phy_ksz80xx.c"
"src/esp_eth_phy_lan87xx.c"
"src/esp_eth_phy_rtl8201.c")
"src/esp_eth_phy_rtl8201.c"
"src/esp_eth_phy_jl1101.c")
endif()

if(CONFIG_ETH_SPI_ETHERNET_DM9051)
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11 changes: 11 additions & 0 deletions components/esp_eth/include/esp_eth_phy.h
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Expand Up @@ -339,6 +339,17 @@ esp_eth_phy_t *esp_eth_phy_new_dp83848(const eth_phy_config_t *config);
*/
esp_eth_phy_t *esp_eth_phy_new_ksz80xx(const eth_phy_config_t *config);

/**
* @brief Create a PHY instance of JL1101
*
* @param[in] config: configuration of PHY
*
* @return
* - instance: create PHY instance successfully
* - NULL: create PHY instance failed because some error occurred
*/
esp_eth_phy_t *esp_eth_phy_new_jl1101(const eth_phy_config_t *config);

#if CONFIG_ETH_SPI_ETHERNET_DM9051
/**
* @brief Create a PHY instance of DM9051
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145 changes: 145 additions & 0 deletions components/esp_eth/src/esp_eth_phy_jl1101.c
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@@ -0,0 +1,145 @@
/*
* SPDX-FileCopyrightText: 2019-2022 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/

#include <string.h>
#include <stdlib.h>
#include <sys/cdefs.h>
#include "esp_log.h"
#include "esp_check.h"
#include "esp_eth_phy_802_3.h"

static const char *TAG = "jl1101";

/***************Vendor Specific Register***************/

/**
* @brief PSR(Page Select Register)
*
*/
typedef union {
struct {
uint16_t page_select : 8; /* Select register page, default is 0 */
uint16_t reserved : 8; /* Reserved */
};
uint16_t val;
} psr_reg_t;
#define ETH_PHY_PSR_REG_ADDR (0x1F)

typedef struct {
phy_802_3_t phy_802_3;
} phy_jl1101_t;

static esp_err_t jl1101_page_select(phy_jl1101_t *jl1101, uint32_t page)
{
esp_err_t ret = ESP_OK;
esp_eth_mediator_t *eth = jl1101->phy_802_3.eth;
psr_reg_t psr = {
.page_select = page
};
ESP_GOTO_ON_ERROR(eth->phy_reg_write(eth, jl1101->phy_802_3.addr, ETH_PHY_PSR_REG_ADDR, psr.val), err, TAG, "write PSR failed");
return ESP_OK;
err:
return ret;
}

static esp_err_t jl1101_update_link_duplex_speed(phy_jl1101_t *jl1101)
{
esp_err_t ret = ESP_OK;
esp_eth_mediator_t *eth = jl1101->phy_802_3.eth;
uint32_t addr = jl1101->phy_802_3.addr;
eth_speed_t speed = ETH_SPEED_10M;
eth_duplex_t duplex = ETH_DUPLEX_HALF;
bmcr_reg_t bmcr;
bmsr_reg_t bmsr;
uint32_t peer_pause_ability = false;
anlpar_reg_t anlpar;
ESP_GOTO_ON_ERROR(jl1101_page_select(jl1101, 0), err, TAG, "select page 0 failed");
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMSR_REG_ADDR, &(bmsr.val)), err, TAG, "read BMSR failed");
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_ANLPAR_REG_ADDR, &(anlpar.val)), err, TAG, "read ANLPAR failed");
eth_link_t link = bmsr.link_status ? ETH_LINK_UP : ETH_LINK_DOWN;
/* check if link status changed */
if (jl1101->phy_802_3.link_status != link) {
/* when link up, read negotiation result */
if (link == ETH_LINK_UP) {
ESP_GOTO_ON_ERROR(eth->phy_reg_read(eth, addr, ETH_PHY_BMCR_REG_ADDR, &(bmcr.val)), err, TAG, "read BMCR failed");
if (bmcr.speed_select) {
speed = ETH_SPEED_100M;
} else {
speed = ETH_SPEED_10M;
}
if (bmcr.duplex_mode) {
duplex = ETH_DUPLEX_FULL;
} else {
duplex = ETH_DUPLEX_HALF;
}
ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_SPEED, (void *)speed), err, TAG, "change speed failed");
ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_DUPLEX, (void *)duplex), err, TAG, "change duplex failed");
/* if we're in duplex mode, and peer has the flow control ability */
if (duplex == ETH_DUPLEX_FULL && anlpar.symmetric_pause) {
peer_pause_ability = 1;
} else {
peer_pause_ability = 0;
}
ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_PAUSE, (void *)peer_pause_ability), err, TAG, "change pause ability failed");
}
ESP_GOTO_ON_ERROR(eth->on_state_changed(eth, ETH_STATE_LINK, (void *)link), err, TAG, "change link failed");
jl1101->phy_802_3.link_status = link;
}
return ESP_OK;
err:
return ret;
}

static esp_err_t jl1101_get_link(esp_eth_phy_t *phy)
{
esp_err_t ret = ESP_OK;
phy_jl1101_t *jl1101 = __containerof(esp_eth_phy_into_phy_802_3(phy), phy_jl1101_t, phy_802_3);
/* Updata information about link, speed, duplex */
ESP_GOTO_ON_ERROR(jl1101_update_link_duplex_speed(jl1101), err, TAG, "update link duplex speed failed");
return ESP_OK;
err:
return ret;
}

static esp_err_t jl1101_init(esp_eth_phy_t *phy)
{
esp_err_t ret = ESP_OK;
phy_802_3_t *phy_802_3 = esp_eth_phy_into_phy_802_3(phy);

/* Basic PHY init */
ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_basic_phy_init(phy_802_3), err, TAG, "failed to init PHY");

/* Check PHY ID */
uint32_t oui;
uint8_t model;
ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_read_oui(phy_802_3, &oui), err, TAG, "read OUI failed");
ESP_GOTO_ON_ERROR(esp_eth_phy_802_3_read_manufac_info(phy_802_3, &model, NULL), err, TAG, "read manufacturer's info failed");
ESP_GOTO_ON_FALSE(oui == 0x24DF10 && model == 0x2, ESP_FAIL, err, TAG, "wrong chip ID");

return ESP_OK;
err:
return ret;
}

esp_eth_phy_t *esp_eth_phy_new_jl1101(const eth_phy_config_t *config)
{
esp_eth_phy_t *ret = NULL;
phy_jl1101_t *jl1101 = calloc(1, sizeof(phy_jl1101_t));
ESP_GOTO_ON_FALSE(jl1101, NULL, err, TAG, "calloc jl1101 failed");
ESP_GOTO_ON_FALSE(esp_eth_phy_802_3_obj_config_init(&jl1101->phy_802_3, config) == ESP_OK,
NULL, err, TAG, "configuration initialization of PHY 802.3 failed");

// redefine functions which need to be customized for sake of jl1101
jl1101->phy_802_3.parent.init = jl1101_init;
jl1101->phy_802_3.parent.get_link = jl1101_get_link;

return &jl1101->phy_802_3.parent;
err:
if (jl1101 != NULL) {
free(jl1101);
}
return ret;
}
2 changes: 2 additions & 0 deletions components/esp_hw_support/mac_addr.c
Original file line number Diff line number Diff line change
Expand Up @@ -278,6 +278,8 @@ static esp_err_t get_efuse_mac_get_default(uint8_t *mac)
uint32_t mac_low = ((uint32_t)mac[2] << 24) | ((uint32_t)mac[3] << 16) | ((uint32_t)mac[4] << 8) | mac[5];
if (((mac_high & 0xFFFF) == 0x18fe) && (mac_low >= 0x346a85c7) && (mac_low <= 0x346a85f8)) {
return ESP_OK;
} else if (esp_efuse_get_pkg_ver() == 3) {
return ESP_OK; // override for Xiaomi SOC's and maybe others too
} else {
ESP_LOGE(TAG, "Base MAC address from BLK0 of EFUSE CRC error, efuse_crc = 0x%02x; calc_crc = 0x%02x", efuse_crc, calc_crc);
#ifdef CONFIG_ESP_MAC_IGNORE_MAC_CRC_ERROR
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4 changes: 2 additions & 2 deletions components/esp_psram/esp32/esp_psram_impl_quad.c
Original file line number Diff line number Diff line change
Expand Up @@ -845,7 +845,7 @@ esp_err_t IRAM_ATTR esp_psram_impl_enable(psram_vaddr_mode_t vaddrmode) //psra
psram_io.psram_cs_io = D2WD_PSRAM_CS_IO;
} else if (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4 && ESP_CHIP_REV_ABOVE(efuse_hal_chip_revision(), 300)) {
ESP_EARLY_LOGE(TAG, "This chip is ESP32-PICO-V3. It does not support PSRAM (disable it in Kconfig)");
abort();
return ESP_FAIL;
} else if ((pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4) || (pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32U4WDH)) {
ESP_EARLY_LOGI(TAG, "This chip is %s",
(pkg_ver == EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4)? "ESP32-PICO": "ESP32-U4WDH");
Expand Down Expand Up @@ -882,7 +882,7 @@ esp_err_t IRAM_ATTR esp_psram_impl_enable(psram_vaddr_mode_t vaddrmode) //psra
psram_io.psram_cs_io = D0WDR2_V3_PSRAM_CS_IO;
} else {
ESP_EARLY_LOGE(TAG, "Not a valid or known package id: %d", pkg_ver);
abort();
return ESP_FAIL;
}
s_psram_cs_io = psram_io.psram_cs_io;

Expand Down
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