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Added Aarch64 support to oclmath library #921

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16 changes: 14 additions & 2 deletions oclmath/fpcontrol.h
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,11 @@
__asm__ volatile ("fmrx %0, fpscr" : "=r"(fpscr));
*mode = fpscr;
__asm__ volatile ("fmxr fpscr, %0" :: "r"(fpscr | (1U << 24)));
#elif defined ( __aarch64__ )
unsigned fpcr;
__asm__ volatile ("mrs %0, fpcr" : "=r"(fpcr));
*mode = fpcr;
__asm__ volatile ("msr fpcr, %0" :: "r"(fpcr | (1U << 24)));
#else
#error ForceFTZ needs an implentation
#endif
Expand All @@ -50,6 +55,11 @@
__asm__ volatile ("fmrx %0, fpscr" : "=r"(fpscr));
*mode = fpscr;
__asm__ volatile ("fmxr fpscr, %0" :: "r"(fpscr & ~(1U << 24)));
#elif defined ( __aarch64__ )
unsigned fpcr;
__asm__ volatile ("mrs %0, fpcr" : "=r"(fpcr));
*mode = fpcr;
__asm__ volatile ("msr fpcr, %0" :: "r"(fpcr & ~(1U << 24)));
#else
#error DisableFTZ needs an implentation
#endif
Expand All @@ -62,8 +72,10 @@
_mm_setcsr( *mode );
#elif defined( __PPC__)
fpu_control = *mode;
#elif defined (__arm__)
#elif defined (__arm__)
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__asm__ volatile ("fmxr fpscr, %0" :: "r"(*mode));
#elif defined( __aarch64__ )
__asm__ volatile ("msr fpcr, %0" :: "r"(*mode));
#else
#error RestoreFPState needs an implementation
#endif
Expand All @@ -72,4 +84,4 @@
#error ForceFTZ and RestoreFPState need implentations
#endif

#endif
#endif
2 changes: 1 addition & 1 deletion oclmath/reference_math.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4800,7 +4800,7 @@ static long double reference_scalblnl(long double x, long n)

return x;

#elif defined(__arm__) // ARM .. sizeof(long double) == sizeof(double)
#elif defined(__arm__) || defined( __aarch64__ )// ARM .. sizeof(long double) == sizeof(double)
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#if __DBL_MAX_EXP__ >= __LDBL_MAX_EXP__
if(reference_isinfl(x) || reference_isnanl(x))
Expand Down
10 changes: 9 additions & 1 deletion oclmath/rounding_mode.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -190,6 +190,10 @@ void *FlushToZero( void )
#define _ARM_FE_FTZ 0x1000000
#define _ARM_FE_NFTZ 0x0
#define _FPU_SETCW(cw) __asm__ ("VMSR FPSCR,%0" : :"ri" (cw))
#elif defined(__aarch64__)
#define _ARM_FE_FTZ 0x1000000
#define _ARM_FE_NFTZ 0x0
#define _FPU_SETCW(cw) __asm__ ("MSR FPCR,%0" : :"ri" (cw))

static const int ftz_modes[ kRoundingModeCount ] = { _ARM_FE_FTZ, _ARM_FE_NFTZ };
const int *f = ftz_modes;
Expand Down Expand Up @@ -220,6 +224,10 @@ void UnFlushToZero( void *p)
#define _ARM_FE_FTZ 0x1000000
#define _ARM_FE_NFTZ 0x0
#define _FPU_SETCW(cw) __asm__ ("VMSR FPSCR,%0" : :"ri" (cw))
#elif defined(__aarch64__)
#define _ARM_FE_FTZ 0x1000000
#define _ARM_FE_NFTZ 0x0
#define _FPU_SETCW(cw) __asm__ ("MSR FPCR,%0" : :"ri" (cw))
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static const int ftz_modes[ kRoundingModeCount ] = { _ARM_FE_FTZ, _ARM_FE_NFTZ };
const int *f = ftz_modes;
Expand All @@ -230,7 +238,7 @@ void UnFlushToZero( void *p)
flags &= ~_FPU_MASK_NI;
_FPU_SETCW(flags);
#else
#error Unknown arch
#error Unknown arch 1
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#endif
#else
#error Please configure FlushToZero and UnFlushToZero to behave properly on this operating system.
Expand Down