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update hwlp v0 arch
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PhilippvK committed Nov 17, 2023
1 parent 0dd6f4c commit bc67f9c
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Showing 26 changed files with 444 additions and 444 deletions.
2 changes: 1 addition & 1 deletion ArchImpl/RV32IMAFDXCoreVHwlpV0/CMakeLists.txt
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@@ -1,4 +1,4 @@
# Generated on Fri, 17 Nov 2023 19:17:42 +0100.
# Generated on Fri, 17 Nov 2023 19:46:42 +0100.
#
# This file contains the CMake build info for the RV32IMAFDXCoreVHwlpV0 core architecture.

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2 changes: 1 addition & 1 deletion ArchImpl/RV32IMAFDXCoreVHwlpV0/RV32IMAFDXCoreVHwlpV0.h
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the registers for the RV32IMAFDXCoreVHwlpV0 core architecture.
*/
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the architecture class for the RV32IMAFDXCoreVHwlpV0 core architecture.
*/
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2 changes: 1 addition & 1 deletion ArchImpl/RV32IMAFDXCoreVHwlpV0/RV32IMAFDXCoreVHwlpV0Arch.h
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the architecture class for the RV32IMAFDXCoreVHwlpV0 core architecture.
*/
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the library interface for the RV32IMAFDXCoreVHwlpV0 core architecture.
*/
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the architecture specific header for the RV32IMAFDXCoreVHwlpV0
* core architecture.
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the function macros for the RV32IMAFDXCoreVHwlpV0 core architecture.
*/
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the GDBCore adapter for the RV32IMAFDXCoreVHwlpV0 core architecture.
*
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the instruction behavior models of the default
* instruction set for the RV32IMAFDXCoreVHwlpV0 core architecture.
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20 changes: 10 additions & 10 deletions ArchImpl/RV32IMAFDXCoreVHwlpV0/RV32IMAFDXCoreVHwlpV0_RV32AInstr.cpp
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@@ -1,5 +1,5 @@
/**
* Generated on Fri, 17 Nov 2023 19:17:42 +0100.
* Generated on Fri, 17 Nov 2023 19:46:42 +0100.
*
* This file contains the instruction behavior models of the RV32A
* instruction set for the RV32IMAFDXCoreVHwlpV0 core architecture.
Expand Down Expand Up @@ -145,7 +145,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOSWAPW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -314,7 +314,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOADDW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -483,7 +483,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOXORW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -652,7 +652,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOANDW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -821,7 +821,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOORW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -990,7 +990,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOMINW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -1159,7 +1159,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOMAXW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -1328,7 +1328,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOMINUW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

Expand Down Expand Up @@ -1497,7 +1497,7 @@ cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
cp.code() = std::string("//AMOMAXUW\n");

// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending | cpu->exception | cpu->nextPc != " + std::to_string(ic.current_address_ + 4) + "ULL) return cpu->exception;\n";
cp.code() += "if (cpu->return_pending | cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
}

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